Add error on redefining preprocessor directives.

Changes

@@ -6,6 +6,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
 
 ****  Fix for loop missing initializer, bug1605. [Andrew Holme]
 
+****  Add error on redefining preprocessor directives. [Piotr Binkowski]
+
 
 * Verilator 4.022 2019-11-10
 

src/V3PreProc.cpp

@@ -24,6 +24,7 @@
 #include "V3Error.h"
 #include "V3Global.h"
 #include "V3File.h"
+#include "V3LanguageWords.h"
 #include "V3PreLex.h"
 #include "V3PreProc.h"
 #include "V3PreShell.h"
@@ -337,18 +338,23 @@ FileLine* V3PreProcImp::defFileline(const string& name) {
 void V3PreProcImp::define(FileLine* fl, const string& name, const string& value,
                           const string& params, bool cmdline) {
     UINFO(4,"DEFINE '"<<name<<"' as '"<<value<<"' params '"<<params<<"'"<<endl);
-    if (defExists(name)) {
-        if (!(defValue(name)==value && defParams(name)==params)) {  // Duplicate defs are OK
-            fl->v3warn(REDEFMACRO, "Redefining existing define: '"<<name<<"', with different value: "
-                       <<value<<(params=="" ? "":" ")<<params);
-            defFileline(name)->v3warn(REDEFMACRO, "Previous definition is here, with value: "
-                                      <<defValue(name)
-                                      <<(defParams(name)=="" ? "":" ")
-                                      <<defParams(name));
+    if (!V3LanguageWords::isKeyword(string("`") + name).empty()) {
+        fl->v3error("Attempting to define built-in directive: '`"<<name<<"' (IEEE 2017 22.5.1)");
+    } else {
+        if (defExists(name)) {
+            if (!(defValue(name) == value
+                  && defParams(name) == params)) {  // Duplicate defs are OK
+                fl->v3warn(REDEFMACRO, "Redefining existing define: '"<<name<<"', with different value: "
+                           <<value<<(params=="" ? "":" ")<<params);
+                defFileline(name)->v3warn(REDEFMACRO, "Previous definition is here, with value: "
+                                          << defValue(name)
+                                          << (defParams(name).empty() ? "" : " ")
+                                          << defParams(name));
+            }
+            undef(name);
         }
-        undef(name);
+        m_defines.insert(make_pair(name, VDefine(fl, value, params, cmdline)));
     }
-    m_defines.insert(make_pair(name, VDefine(fl, value, params, cmdline)));
 }
 
 string V3PreProcImp::removeDefines(const string& text) {

test_regress/t/t_pp_defkwd_bad.out

@@ -0,0 +1,2 @@
+%Error: t/t_pp_defkwd_bad.v:7: Attempting to define built-in directive: '`define' (IEEE 2017 22.5.1)
+%Error: Exiting due to

test_regress/t/t_pp_defkwd_bad.pl

@@ -0,0 +1,18 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_pp_defkwd_bad.v

@@ -0,0 +1,6 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Wilson Snyder.
+
+`define define 1