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Fix misc bad-syntax crashes, bug1530.

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This commit is contained in:
Wilson Snyder 2019-09-30 19:48:01 -04:00
parent dd4aa948ae
commit 9eaec3b5c1
5 changed files with 34 additions and 3 deletions
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2
Changes
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@ -22,7 +22,7 @@ The contributors that suggested a given feature are shown in []. Thanks!
**** Fix ugly error on interface misuse, bug1525. [Bogdan Vukobratovic]
**** Fix misc bad-syntax crashes, bug1529, bug1532. [Eric Rippey]
**** Fix misc bad-syntax crashes, bug1529-bug1530, bug1532. [Eric Rippey]
* Verilator 4.018 2019-08-29

9
src/V3Number.cpp
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@ -31,6 +31,7 @@
#include <iomanip>
#define MAX_SPRINTF_DOUBLE_SIZE 100 // Maximum characters with a sprintf %e/%f/%g (probably < 30)
#define MAX_WIDTH 5*1024 // Maximum width before error
// Number operations build output in-place so can't call e.g. foo.opX(foo)
#define NUM_ASSERT_OP_ARGS1(arg1) \
@ -106,7 +107,13 @@ void V3Number::V3NumberCreate(AstNode* nodep, const char* sourcep, FileLine* fl)
value_startp = cp;
if (atoi(widthn)) {
width(atoi(widthn), true);
if (atoi(widthn) < 0 || atoi(widthn) > MAX_WIDTH) {
// atoi might convert large number to negative, so can't tell which
v3error("Unsupported: Width of number exceeds implementation limit: "<<sourcep);
width(MAX_WIDTH, true);
} else {
width(atoi(widthn), true);
}
}
} else {
unbased = true;

2
test_regress/driver.pl
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@ -416,7 +416,7 @@ sub sprint_summary {
$out .= " Failed-First $self->{fail1_cnt}";
$out .= " Skipped $self->{skip_cnt}";
$out .= " Unsup $self->{unsup_cnt}";
$out .= sprintf(" Eta %d:%02d", int($eta/60), $eta%60) if $self->{left_cnt} && $eta > 10;
$out .= sprintf(" Eta %d:%02d", int($eta/60), $eta%60) if $self->{left_cnt} > 10 && $eta > 10;
$out .= sprintf(" Time %d:%02d", int($delta/60), $delta%60);
return $out;
}

17
test_regress/t/t_fuzz_negwidth_bad.pl Executable file
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@ -0,0 +1,17 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(linter => 1);
lint(
fails => 1,
);
ok(1);
1;

7
test_regress/t/t_fuzz_negwidth_bad.v Normal file
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@ -0,0 +1,7 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2019 by Wilson Snyder.
int a = -12'd1;
int b = 1231232312312312'd1;