forked from github/verilator
Support arrayed parameter overrides, bug1153.
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Changes
4
Changes
@ -5,7 +5,9 @@ The contributors that suggested a given feature are shown in []. Thanks!
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* Verilator 3.903 devel
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*** Support ports of array of reals, bug1154. [J Briquet]
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*** Support ports of array of reals, bug1154. [J Briquet]
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*** Support arrayed parameter overrides, bug1153. [John Stevenson]
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**** Fix non-arrayed cells with interface arrays, bug1153. [John Stevenson]
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@ -1491,6 +1491,14 @@ private:
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did=true;
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}
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}
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else if (m_params && valuep->castInitArray() && nodep->backp()->castPin()) {
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// Allow parameters to pass arrays
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// Earlier recursion of InitArray made sure each array value is constant
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// This exception is fairly fragile, i.e. doesn't support arrays of arrays or other stuff
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AstNode* newp = valuep->cloneTree(false);
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nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep);
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did = true;
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}
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}
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}
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if (!did && m_required) {
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@ -493,6 +493,12 @@ void ParamVisitor::visitCell(AstCell* nodep) {
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if (AstVar* modvarp = pinp->modVarp()) {
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if (!modvarp->isGParam()) {
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pinp->v3error("Attempted parameter setting of non-parameter: Param "<<pinp->prettyName()<<" of "<<nodep->prettyName());
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} else if (pinp->exprp()->castInitArray()
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&& modvarp->subDTypep()->castUnpackArrayDType()) {
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// Array assigned to array
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AstNode* exprp = pinp->exprp();
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longname += "_" + paramSmallName(nodep->modp(),modvarp)+paramValueNumber(exprp);
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any_overrides = true;
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} else {
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AstConst* exprp = pinp->exprp()->castConst();
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AstConst* origp = modvarp->valuep()->castConst();
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@ -651,11 +657,11 @@ void ParamVisitor::visitCell(AstCell* nodep) {
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for (AstPin* pinp = nodep->paramsp(); pinp; pinp=pinp->nextp()->castPin()) {
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if (pinp->exprp()) {
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if (AstVar* modvarp = pinp->modVarp()) {
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AstConst* constp = pinp->exprp()->castConst();
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AstNode* newp = pinp->exprp(); // Const or InitArray
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// Remove any existing parameter
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if (modvarp->valuep()) modvarp->valuep()->unlinkFrBack()->deleteTree();
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// Set this parameter to value requested by cell
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modvarp->valuep(constp->cloneTree(false));
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modvarp->valuep(newp->cloneTree(false));
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}
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else if (AstParamTypeDType* modptp = pinp->modPTypep()) {
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AstNodeDType* dtypep = pinp->exprp()->castNodeDType();
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@ -873,7 +873,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
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/* Attributes */
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/* Note simulators vary in support for "(* /_*something*_/ foo*)" where _ doesn't exist */
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<V95,V01,V05,VA5,S05,S09,S12,SAX>{
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"(*"({ws}|{crnl})*({id}|{escid}) { yymore(); yy_push_state(ATTRMODE); } // Doesn't match (*), but (* attr_spec
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"(*"({ws}|{crnl})*({id}|{escid}) { yymore(); yy_push_state(ATTRMODE); } /* Doesn't match (*), but (* attr_spec */
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}
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/************************************************************************/
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18
test_regress/t/t_param_array2.pl
Executable file
18
test_regress/t/t_param_array2.pl
Executable file
@ -0,0 +1,18 @@
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#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003 by Wilson Snyder. This program is free software; you can
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# redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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compile (
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);
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execute (
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check_finished=>1,
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);
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ok(1);
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1;
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21
test_regress/t/t_param_array2.v
Normal file
21
test_regress/t/t_param_array2.v
Normal file
@ -0,0 +1,21 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2017 by Wilson Snyder.
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module t;
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localparam int c[4] = '{5, 6, 7, 8};
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a #(.p(c)) i_a ();
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endmodule
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module a
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#( parameter int p[4] = '{1, 2, 3, 4} );
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initial begin
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if (p[0] != 5) $stop;
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if (p[1] != 6) $stop;
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if (p[2] != 7) $stop;
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if (p[3] != 8) $stop;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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