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Support const cast (ignored since not linting const yet)

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This commit is contained in:
Wilson Snyder 2020-05-26 20:44:20 -04:00
parent 2af7f2fa18
commit 978c35995a
2 changed files with 3 additions and 2 deletions
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4
src/verilog.y
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@ -3872,10 +3872,10 @@ expr<nodep>: // IEEE: part of expression/constant_expression/primary
| ySIGNED yP_TICK '(' expr ')' { $$ = new AstSigned($1, $4); }
| yUNSIGNED yP_TICK '(' expr ')' { $$ = new AstUnsigned($1, $4); }
| ySTRING yP_TICK '(' expr ')' { $$ = new AstCvtPackString($1, $4); }
//UNSUP yCONST__ETC yP_TICK '(' expr ')' { UNSUP }
| yCONST__ETC yP_TICK '(' expr ')' { $$ = $4; } // Not linting const presently
// // Spec only allows primary with addition of a type reference
// // We'll be more general, and later assert LHS was a type.
| ~l~expr yP_TICK '(' expr ')' { $$ = new AstCastParse($2,$4,$1); }
| ~l~expr yP_TICK '(' expr ')' { $$ = new AstCastParse($2,$4,$1); }
//
// // IEEE: assignment_pattern_expression
// // IEEE: streaming_concatenation

1
test_regress/t/t_cast.v
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@ -46,6 +46,7 @@ module t;
if (signed'(4'hf) > 4'sh0) $stop;
if (4'hf < 4'h0) $stop;
if (unsigned'(4'shf) < 4'h0) $stop;
if (const'(4'shf) !== 4'shf) $stop;
if (4'(allones) !== 4'hf) $stop;
if (6'(allones) !== 6'h3f) $stop;
if ((4)'(allones) !== 4'hf) $stop;