forked from github/verilator
Support float and shorts, bug1592, bug1619.
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
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2
Changes
@ -20,6 +20,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
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**** Add error on redefining preprocessor directives. [Piotr Binkowski]
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**** Support $value$plusargs float and shorts, bug1592, bug1619. [Garrett Smith]
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**** Fix color assertion on empty if, bug1604. [Andrew Holme]
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**** Fix for loop missing initializer, bug1605. [Andrew Holme]
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@ -8,6 +8,7 @@ Ahmed El-Mahmoudy
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Alex Chadwick
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Chris Randall
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Eric Rippey
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Garrett Smith
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Gianfranco Costamagna
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Howard Su
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Iztok Jeras
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@ -1708,9 +1708,24 @@ IData VL_VALUEPLUSARGS_INW(int rbits, const std::string& ld, WDataOutP rwp) VL_M
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_vl_vsss_setbit(rwp, rbits, lsb, 8, dp[posp]); lsb+=8;
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}
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break;
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case 'e': // FALLTHRU - Unsupported
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case 'f': // FALLTHRU - Unsupported
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case 'g': // FALLTHRU - Unsupported
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case 'e': {
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double temp = 0.f;
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sscanf(dp, "%le", &temp);
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VL_SET_WQ(rwp, VL_CVT_Q_D(temp));
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break;
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}
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case 'f': {
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double temp = 0.f;
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sscanf(dp, "%lf", &temp);
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VL_SET_WQ(rwp, VL_CVT_Q_D(temp));
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break;
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}
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case 'g': {
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double temp = 0.f;
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sscanf(dp, "%lg", &temp);
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VL_SET_WQ(rwp, VL_CVT_Q_D(temp));
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break;
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}
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default: // Other simulators simply return 0 in these cases and don't error out
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return 0;
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}
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@ -318,6 +318,18 @@ extern void VL_SFORMAT_X(int obits_ignored, std::string& output,
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const char* formatp, ...) VL_MT_SAFE;
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extern std::string VL_SFORMATF_NX(const char* formatp, ...) VL_MT_SAFE;
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extern IData VL_VALUEPLUSARGS_INW(int rbits, const std::string& ld, WDataOutP rwp) VL_MT_SAFE;
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inline IData VL_VALUEPLUSARGS_INI(int rbits, const std::string& ld, CData& rdr) VL_MT_SAFE {
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WData rwp[2]; // WData must always be at least 2
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IData got = VL_VALUEPLUSARGS_INW(rbits,ld,rwp);
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if (got) rdr = rwp[0];
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return got;
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}
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inline IData VL_VALUEPLUSARGS_INI(int rbits, const std::string& ld, SData& rdr) VL_MT_SAFE {
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WData rwp[2]; // WData must always be at least 2
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IData got = VL_VALUEPLUSARGS_INW(rbits,ld,rwp);
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if (got) rdr = rwp[0];
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return got;
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}
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inline IData VL_VALUEPLUSARGS_INI(int rbits, const std::string& ld, IData& rdr) VL_MT_SAFE {
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WData rwp[2]; // WData must always be at least 2
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IData got = VL_VALUEPLUSARGS_INW(rbits, ld, rwp);
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@ -330,6 +342,12 @@ inline IData VL_VALUEPLUSARGS_INQ(int rbits, const std::string& ld, QData& rdr)
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if (got) rdr = VL_SET_QW(rwp);
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return got;
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}
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inline IData VL_VALUEPLUSARGS_INQ(int rbits, const std::string& ld, double& rdr) VL_MT_SAFE {
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WData rwp[2];
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IData got = VL_VALUEPLUSARGS_INW(rbits,ld,rwp);
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if (got) rdr = VL_CVT_D_Q(VL_SET_QW(rwp));
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return got;
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}
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extern IData VL_VALUEPLUSARGS_INN(int, const std::string& ld, std::string& rdr) VL_MT_SAFE;
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#endif // Guard
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@ -15,7 +15,7 @@ compile(
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execute(
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check_finished => 1,
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all_run_flags => ['+PLUS +INT=1234 +STRSTR'],
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all_run_flags => ['+PLUS +INT=1234 +STRSTR +REAL=1.2345'],
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);
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ok(1);
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@ -5,7 +5,10 @@
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module t;
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integer p_i;
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integer p_i; // signal type IData
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reg [15:0] p_s; // signal type SData
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reg [7:0] p_c; // signal type CData
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real p_r; // signal type double
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reg [7*8:1] p_str;
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string sv_str;
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reg [7*8:1] p_in;
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@ -35,6 +38,32 @@ module t;
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if (!$value$plusargs("INT=%o", p_i)) $stop;
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if (p_i !== 32'o1234) $stop;
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// Check handling of 'SData' type signals (Issue #1592)
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p_s = 0;
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if (!$value$plusargs("INT=%d", p_s)) $stop;
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if (p_s !== 16'd1234) $stop;
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// Check handling of 'CData' type signals (Issue #1592)
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p_c = 0;
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if (!$value$plusargs("INT=%d", p_c)) $stop;
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if (p_c !== 8'd210) $stop;
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// Check handling of 'double' type signals (Issue #1619)
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p_r = 0;
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if (!$value$plusargs("REAL=%e", p_r)) $stop;
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$display("r='%e'", p_r);
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if (p_r !== 1.2345) $stop;
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p_r = 0;
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if (!$value$plusargs("REAL=%f", p_r)) $stop;
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$display("r='%f'", p_r);
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if (p_r !== 1.2345) $stop;
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p_r = 0;
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if (!$value$plusargs("REAL=%g", p_r)) $stop;
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$display("r='%g'", p_r);
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if (p_r !== 1.2345) $stop;
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p_str = "none";
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if ($value$plusargs("IN%s", p_str)!==1) $stop;
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$display("str='%s'",p_str);
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