forked from github/verilator
Support class extending its parameter (#3904)
This commit is contained in:
parent
21aafe8f50
commit
91c44d7830
@ -3174,20 +3174,46 @@ private:
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cextp->v3error("Attempting to extend using non-class"); // LCOV_EXCL_LINE
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} else {
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VSymEnt* const foundp = m_curSymp->findIdFallback(cpackagerefp->name());
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bool ok = false;
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if (foundp) {
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if (AstClass* const classp = VN_CAST(foundp->nodep(), Class)) {
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AstClassRefDType* classRefDtypep = nullptr;
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AstClass* classp = VN_CAST(foundp->nodep(), Class);
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if (classp) {
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AstPin* paramsp = cpackagerefp->paramsp();
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if (paramsp) paramsp = paramsp->cloneTree(true);
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classRefDtypep
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= new AstClassRefDType{nodep->fileline(), classp, paramsp};
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} else if (AstParamTypeDType* const paramp
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= VN_CAST(foundp->nodep(), ParamTypeDType)) {
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if (m_statep->forPrimary()) {
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// Extending has to be handled after V3Param.cpp, but the type
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// reference has to be visited
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iterate(paramp);
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return;
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} else {
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AstNodeDType* const paramTypep = paramp->getChildDTypep();
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classRefDtypep
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= VN_CAST(paramTypep->cloneTree(false), ClassRefDType);
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if (!classRefDtypep) {
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paramTypep->v3error(
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"Attempting to extend using non-class");
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} else {
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classp = classRefDtypep->classp();
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}
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}
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} else {
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cextp->v3warn(E_UNSUPPORTED,
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"Unsupported: " << foundp->nodep()->prettyTypeName()
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<< " in AstClassExtends");
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}
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if (classp) {
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UINFO(8, "Import to " << nodep << " from export class " << classp
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<< endl);
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if (classp == nodep) {
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cextp->v3error("Attempting to extend class "
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<< nodep->prettyNameQ() << " from itself");
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} else {
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AstPin* paramsp = cpackagerefp->paramsp();
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if (paramsp) paramsp = paramsp->cloneTree(true);
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const auto newp
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= new AstClassRefDType{nodep->fileline(), classp, paramsp};
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cextp->childDTypep(newp);
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cextp->childDTypep(classRefDtypep);
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classp->isExtended(true);
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nodep->isExtended(true);
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VSymEnt* const srcp = m_statep->getNodeSym(classp);
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@ -3195,10 +3221,8 @@ private:
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VL_DO_DANGLING(cpackagerefp->unlinkFrBack()->deleteTree(),
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cpackagerefp);
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}
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ok = true;
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}
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}
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if (!ok) {
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} else {
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const string suggest = m_statep->suggestSymFallback(
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m_curSymp, cpackagerefp->name(), LinkNodeMatcherClass{});
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cpackagerefp->v3error(
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5
test_regress/t/t_class_extends_alias_unsup.out
Normal file
5
test_regress/t/t_class_extends_alias_unsup.out
Normal file
@ -0,0 +1,5 @@
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%Error-UNSUPPORTED: t/t_class_extends_alias_unsup.v:22:22: Unsupported: TYPEDEF 'foo_t' in AstClassExtends
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22 | class bar extends foo_t;
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| ^~~~~
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... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
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%Error: Exiting due to
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19
test_regress/t/t_class_extends_alias_unsup.pl
Executable file
19
test_regress/t/t_class_extends_alias_unsup.pl
Executable file
@ -0,0 +1,19 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2023 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(linter => 1);
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lint(
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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38
test_regress/t/t_class_extends_alias_unsup.v
Normal file
38
test_regress/t/t_class_extends_alias_unsup.v
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@ -0,0 +1,38 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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module t (/*AUTOARG*/
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);
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class foo;
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int x = 1;
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function int get_x;
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return x;
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endfunction
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function int get_3;
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return 3;
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endfunction
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endclass
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typedef foo foo_t;
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class bar extends foo_t;
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endclass
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bar bar_foo_t_i;
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initial begin
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bar_foo_t_i = new;
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if (bar_foo_t_i.get_x() == 1 && bar_foo_t_i.get_3() == 3) begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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else begin
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$stop;
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end
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end
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endmodule
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5
test_regress/t/t_class_extends_aliased_real_bad.out
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5
test_regress/t/t_class_extends_aliased_real_bad.out
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@ -0,0 +1,5 @@
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%Error: t/t_class_extends_aliased_real_bad.v:14:10: Attempting to extend using non-class
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: ... In instance t
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14 | bar #(real_t) bar_real_t;
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| ^~~~~~
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%Error: Exiting due to
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19
test_regress/t/t_class_extends_aliased_real_bad.pl
Executable file
19
test_regress/t/t_class_extends_aliased_real_bad.pl
Executable file
@ -0,0 +1,19 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2023 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(linter => 1);
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lint(
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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19
test_regress/t/t_class_extends_aliased_real_bad.v
Normal file
19
test_regress/t/t_class_extends_aliased_real_bad.v
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@ -0,0 +1,19 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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module t (/*AUTOARG*/);
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class bar #(type T) extends T;
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endclass
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typedef real real_t;
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bar #(real_t) bar_real_t;
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initial begin
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$stop;
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end
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endmodule
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5
test_regress/t/t_class_extends_int_param_bad.out
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5
test_regress/t/t_class_extends_int_param_bad.out
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@ -0,0 +1,5 @@
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%Error: t/t_class_extends_int_param_bad.v:9:23: Attempting to extend using non-class
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: ... In instance t
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9 | class bar #(type T=int) extends T;
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| ^~~
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%Error: Exiting due to
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test_regress/t/t_class_extends_int_param_bad.pl
Executable file
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test_regress/t/t_class_extends_int_param_bad.pl
Executable file
@ -0,0 +1,19 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2023 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(linter => 1);
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lint(
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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15
test_regress/t/t_class_extends_int_param_bad.v
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15
test_regress/t/t_class_extends_int_param_bad.v
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@ -0,0 +1,15 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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module t (/*AUTOARG*/);
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class bar #(type T=int) extends T;
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endclass
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initial begin
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$stop;
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end
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endmodule
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20
test_regress/t/t_class_extends_param.pl
Executable file
20
test_regress/t/t_class_extends_param.pl
Executable file
@ -0,0 +1,20 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2023 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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compile();
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execute(
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check_finished => 1,
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);
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ok(1);
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1;
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48
test_regress/t/t_class_extends_param.v
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48
test_regress/t/t_class_extends_param.v
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@ -0,0 +1,48 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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module t (/*AUTOARG*/
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);
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class foo;
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int x = 1;
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function int get_x;
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return x;
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endfunction
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function int get_3;
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return 3;
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endfunction
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endclass
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class bar #(type T=foo) extends T;
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endclass
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class baz;
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int x = 2;
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function int get_x;
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return x;
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endfunction
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function int get_4;
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return 4;
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endfunction
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endclass
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bar bar_foo_i;
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bar #(baz) bar_baz_i;
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initial begin
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bar_foo_i = new;
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bar_baz_i = new;
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if (bar_foo_i.get_x() == 1 && bar_foo_i.get_3() == 3 &&
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bar_baz_i.get_x() == 2 && bar_baz_i.get_4() == 4) begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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else begin
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$stop;
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end
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end
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endmodule
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