forked from github/verilator
Fix return type of $countbits functions to int (#3725)
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65e08f4dbf
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8d61cea366
@ -1337,19 +1337,17 @@ private:
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iterateCheckSizedSelf(nodep, "RHS", nodep->rhsp(), SELF, BOTH);
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iterateCheckSizedSelf(nodep, "THS", nodep->thsp(), SELF, BOTH);
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iterateCheckSizedSelf(nodep, "FHS", nodep->fhsp(), SELF, BOTH);
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// If it's a 32 bit number, we need a 6 bit number as we need to return '32'.
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const int selwidth = V3Number::log2b(nodep->lhsp()->width()) + 1;
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nodep->dtypeSetLogicSized(selwidth,
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VSigning::UNSIGNED); // Spec doesn't indicate if an integer
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// For widthMin, if a 32 bit number, we need a 6 bit number as we need to return '32'.
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const int widthMin = V3Number::log2b(nodep->lhsp()->width()) + 1;
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nodep->dtypeSetLogicUnsized(32, widthMin, VSigning::SIGNED);
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}
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}
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void visit(AstCountOnes* nodep) override {
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if (m_vup->prelim()) {
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iterateCheckSizedSelf(nodep, "LHS", nodep->lhsp(), SELF, BOTH);
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// If it's a 32 bit number, we need a 6 bit number as we need to return '32'.
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const int selwidth = V3Number::log2b(nodep->lhsp()->width()) + 1;
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nodep->dtypeSetLogicSized(selwidth,
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VSigning::UNSIGNED); // Spec doesn't indicate if an integer
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// For widthMin, if a 32 bit number, we need a 6 bit number as we need to return '32'.
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const int widthMin = V3Number::log2b(nodep->lhsp()->width()) + 1;
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nodep->dtypeSetLogicUnsized(32, widthMin, VSigning::SIGNED);
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}
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}
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void visit(AstCvtPackString* nodep) override {
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@ -23,19 +23,19 @@ module t(/*AUTOARG*/
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reg [31:0] ctrl1;
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reg [31:0] ctrl2;
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reg [4:0] result_16_1;
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reg [4:0] result_16_2;
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reg [4:0] result_16_3;
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reg [5:0] result_32_1;
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reg [5:0] result_32_2;
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reg [5:0] result_32_3;
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reg [6:0] result_64_1;
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reg [6:0] result_64_2;
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reg [6:0] result_64_3;
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reg [3:0] result_10_3;
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reg [4:0] result_21_3;
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reg [5:0] result_59_3;
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reg [6:0] result_70_3;
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int result_16_1;
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int result_16_2;
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int result_16_3;
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int result_32_1;
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int result_32_2;
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int result_32_3;
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int result_64_1;
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int result_64_2;
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int result_64_3;
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int result_10_3;
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int result_21_3;
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int result_59_3;
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int result_70_3;
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initial begin
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if ($countbits(32'b111100000000, '1) != 4) $stop;
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@ -14,13 +14,13 @@ module t (/*AUTOARG*/
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reg [15:0] l;
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reg [49:0] q;
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reg [79:0] w;
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reg [4:0] lc;
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int lc;
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reg lo;
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reg l0;
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reg [5:0] qc;
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int qc;
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reg qo;
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reg q0;
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reg [6:0] wc;
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int wc;
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reg wo;
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reg w0;
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@ -55,7 +55,7 @@ module t (/*AUTOARG*/
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if ($isunknown(32'b11101011111) != 0) $stop;
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if ($isunknown(32'b10zzzzzzzzz) != 1) $stop;
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if ($bits(0) != 32'd32) $stop;
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if ($bits(lc) != 5) $stop;
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if ($bits(lc) != 32) $stop;
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if ($onehot(32'b00000001000000) != 1'b1) $stop;
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if ($onehot(32'b00001001000000) != 1'b0) $stop;
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if ($onehot(32'b0) != 1'b0) $stop;
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@ -81,51 +81,51 @@ module t (/*AUTOARG*/
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q <= ~50'h0;
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w <= ~80'h0;
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//
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if ({lc,lo,l0} != {5'd0,1'b0,1'b1}) $stop;
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if ({qc,qo,q0} != {6'd0,1'b0,1'b1}) $stop;
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if ({wc,wo,w0} != {7'd0,1'b0,1'b1}) $stop;
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if ({lc,lo,l0} != {32'd0,1'b0,1'b1}) $stop;
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if ({qc,qo,q0} != {32'd0,1'b0,1'b1}) $stop;
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if ({wc,wo,w0} != {32'd0,1'b0,1'b1}) $stop;
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end
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if (cyc==3) begin
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l <= 16'b0010110010110111;
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q <= 50'h01_1111_0001;
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w <= 80'h0100_0000_0f00_00f0_0000;
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//
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if ({lc,lo,l0} != {5'd16,1'b0,1'b0}) $stop;
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if ({qc,qo,q0} != {6'd50,1'b0,1'b0}) $stop;
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if ({wc,wo,w0} != {7'd80,1'b0,1'b0}) $stop;
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if ({lc,lo,l0} != {32'd16,1'b0,1'b0}) $stop;
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if ({qc,qo,q0} != {32'd50,1'b0,1'b0}) $stop;
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if ({wc,wo,w0} != {32'd80,1'b0,1'b0}) $stop;
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end
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if (cyc==4) begin
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l <= 16'b0000010000000000;
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q <= 50'h1_0000_0000;
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w <= 80'h010_00000000_00000000;
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//
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if ({lc,lo,l0} != {5'd9,1'b0,1'b0}) $stop;
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if ({qc,qo,q0} != {6'd6,1'b0,1'b0}) $stop;
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if ({wc,wo,w0} != {7'd9,1'b0,1'b0}) $stop;
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if ({lc,lo,l0} != {32'd9,1'b0,1'b0}) $stop;
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if ({qc,qo,q0} != {32'd6,1'b0,1'b0}) $stop;
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if ({wc,wo,w0} != {32'd9,1'b0,1'b0}) $stop;
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end
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if (cyc==5) begin
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l <= 16'b0000000100000000;
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q <= 50'h8000_0000_0000;
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w <= 80'h10_00000000_00000000;
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//
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if ({lc,lo,l0} != {5'd1,1'b1,1'b1}) $stop;
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if ({qc,qo,q0} != {6'd1,1'b1,1'b1}) $stop;
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if ({wc,wo,w0} != {7'd1,1'b1,1'b1}) $stop;
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if ({lc,lo,l0} != {32'd1,1'b1,1'b1}) $stop;
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if ({qc,qo,q0} != {32'd1,1'b1,1'b1}) $stop;
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if ({wc,wo,w0} != {32'd1,1'b1,1'b1}) $stop;
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end
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if (cyc==6) begin
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l <= 16'b0000100100000000;
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q <= 50'h01_00000100;
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w <= 80'h01_00000100_00000000;
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//
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if ({lc,lo,l0} != {5'd1,1'b1,1'b1}) $stop;
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if ({qc,qo,q0} != {6'd1,1'b1,1'b1}) $stop;
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if ({wc,wo,w0} != {7'd1,1'b1,1'b1}) $stop;
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if ({lc,lo,l0} != {32'd1,1'b1,1'b1}) $stop;
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if ({qc,qo,q0} != {32'd1,1'b1,1'b1}) $stop;
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if ({wc,wo,w0} != {32'd1,1'b1,1'b1}) $stop;
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end
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if (cyc==7) begin
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//
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if ({lc,lo,l0} != {5'd2,1'b0,1'b0}) $stop;
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if ({qc,qo,q0} != {6'd2,1'b0,1'b0}) $stop;
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if ({wc,wo,w0} != {7'd2,1'b0,1'b0}) $stop;
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if ({lc,lo,l0} != {32'd2,1'b0,1'b0}) $stop;
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if ({qc,qo,q0} != {32'd2,1'b0,1'b0}) $stop;
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if ({wc,wo,w0} != {32'd2,1'b0,1'b0}) $stop;
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end
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if (cyc==8) begin
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end
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