From 87e8e219ddefcfce12ddcf20ae0015153c6dcff1 Mon Sep 17 00:00:00 2001 From: Todd Strader Date: Tue, 31 Mar 2020 17:39:37 -0400 Subject: [PATCH] trip equal impl --- src/V3AstNodes.h | 66 ++++++++++++++++++++++++------------------------ src/verilog.y | 6 +++-- 2 files changed, 37 insertions(+), 35 deletions(-) diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index d18a2b502..edb4e6211 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -5324,23 +5324,6 @@ public: virtual bool sizeMattersLhs() const { return false; } virtual bool sizeMattersRhs() const { return false; } }; -class AstEqT : public AstNodeBiCom { -public: - AstEqT(FileLine* fl, AstNode* lhsp, AstNode* rhsp) - : ASTGEN_SUPER(fl, lhsp, rhsp) { dtypeSetLogicBool(); } - ASTNODE_NODE_FUNCS(EqT) - virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp) { return new AstEqT(this->fileline(), lhsp, rhsp); } - virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opEq(lhs, rhs); } - virtual string emitVerilog() { return "%k(%l %f== %r)"; } - // TOOD -- if we can't even emit C, should this be a child of AstNodeMath? - virtual string emitC() { return ""; } - virtual string emitSimpleOperator() { return "=="; } - virtual bool cleanOut() const { return false; } - virtual bool cleanLhs() const { return false; } - virtual bool cleanRhs() const { return false; } - virtual bool sizeMattersLhs() const { return false; } - virtual bool sizeMattersRhs() const { return false; } -}; class AstEqD : public AstNodeBiCom { public: AstEqD(FileLine* fl, AstNode* lhsp, AstNode* rhsp) @@ -5393,22 +5376,6 @@ public: virtual bool sizeMattersLhs() const { return false; } virtual bool sizeMattersRhs() const { return false; } }; -class AstNeqT : public AstNodeBiCom { -public: - AstNeqT(FileLine* fl, AstNode* lhsp, AstNode* rhsp) - : ASTGEN_SUPER(fl, lhsp, rhsp) { dtypeSetLogicBool(); } - ASTNODE_NODE_FUNCS(NeqT) - virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp) { return new AstNeqT(this->fileline(), lhsp, rhsp); } - virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opNeq(lhs, rhs); } - virtual string emitVerilog() { return "%k(%l %f!= %r)"; } - virtual string emitC() { return ""; } - virtual string emitSimpleOperator() { return "!="; } - virtual bool cleanOut() const { return false; } - virtual bool cleanLhs() const { return false; } - virtual bool cleanRhs() const { return false; } - virtual bool sizeMattersLhs() const { return false; } - virtual bool sizeMattersRhs() const { return false; } -}; class AstNeqD : public AstNodeBiCom { public: AstNeqD(FileLine* fl, AstNode* lhsp, AstNode* rhsp) @@ -5723,6 +5690,39 @@ public: virtual int instrCount() const { return instrCountString(); } virtual bool stringFlavor() const { return true; } }; +class AstEqT : public AstNodeBiCom { +public: + AstEqT(FileLine* fl, AstNode* lhsp, AstNode* rhsp) + : ASTGEN_SUPER(fl, lhsp, rhsp) { dtypeSetLogicBool(); } + ASTNODE_NODE_FUNCS(EqT) + virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp) { return new AstEqT(this->fileline(), lhsp, rhsp); } + virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opEq(lhs, rhs); } + virtual string emitVerilog() { return "%k(%l %f== %r)"; } + // TOOD -- if we can't even emit C, should this be a child of AstNodeMath? + virtual string emitC() { return ""; } + virtual string emitSimpleOperator() { return "=="; } + virtual bool cleanOut() const { return false; } + virtual bool cleanLhs() const { return false; } + virtual bool cleanRhs() const { return false; } + virtual bool sizeMattersLhs() const { return false; } + virtual bool sizeMattersRhs() const { return false; } +}; +class AstNeqT : public AstNodeBiCom { +public: + AstNeqT(FileLine* fl, AstNode* lhsp, AstNode* rhsp) + : ASTGEN_SUPER(fl, lhsp, rhsp) { dtypeSetLogicBool(); } + ASTNODE_NODE_FUNCS(NeqT) + virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp) { return new AstNeqT(this->fileline(), lhsp, rhsp); } + virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opNeq(lhs, rhs); } + virtual string emitVerilog() { return "%k(%l %f!= %r)"; } + virtual string emitC() { return ""; } + virtual string emitSimpleOperator() { return "!="; } + virtual bool cleanOut() const { return false; } + virtual bool cleanLhs() const { return false; } + virtual bool cleanRhs() const { return false; } + virtual bool sizeMattersLhs() const { return false; } + virtual bool sizeMattersRhs() const { return false; } +}; class AstShiftL : public AstNodeBiop { public: AstShiftL(FileLine* fl, AstNode* lhsp, AstNode* rhsp, int setwidth=0) diff --git a/src/verilog.y b/src/verilog.y index c9a1c236c..e62d35236 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -3695,9 +3695,11 @@ expr: // IEEE: part of expression/constant_expression/primary | ~l~expr '*' ~r~expr { $$ = new AstMul ($2,$1,$3); } | ~l~expr '/' ~r~expr { $$ = new AstDiv ($2,$1,$3); } | ~l~expr '%' ~r~expr { $$ = new AstModDiv ($2,$1,$3); } - | type_reference yP_EQUAL type_reference { $$ = new AstEqT ($2,$1,$3); } + | type_reference yP_EQUAL type_reference { $$ = new AstEqT ($2,$1,$3); } + | type_reference yP_NOTEQUAL type_reference { $$ = new AstNeqT ($2,$1,$3); } + | type_reference yP_CASEEQUAL type_reference { $$ = new AstEqT ($2,$1,$3); } + | type_reference yP_CASENOTEQUAL type_reference { $$ = new AstNeqT ($2,$1,$3); } | ~l~expr yP_EQUAL ~r~expr { $$ = new AstEq ($2,$1,$3); } - | type_reference yP_NOTEQUAL type_reference { $$ = new AstNeqT ($2,$1,$3); } | ~l~expr yP_NOTEQUAL ~r~expr { $$ = new AstNeq ($2,$1,$3); } | ~l~expr yP_CASEEQUAL ~r~expr { $$ = new AstEqCase ($2,$1,$3); } | ~l~expr yP_CASENOTEQUAL ~r~expr { $$ = new AstNeqCase ($2,$1,$3); }