From 8535fad052a90c588bf3cc83e107725326475d9c Mon Sep 17 00:00:00 2001 From: Todd Strader Date: Fri, 28 Feb 2020 18:05:51 -0500 Subject: [PATCH] Type comparison test --- test_regress/t/t_type_comparison.pl | 20 ++++++++++++ test_regress/t/t_type_comparison.v | 49 +++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+) create mode 100755 test_regress/t/t_type_comparison.pl create mode 100644 test_regress/t/t_type_comparison.v diff --git a/test_regress/t/t_type_comparison.pl b/test_regress/t/t_type_comparison.pl new file mode 100755 index 000000000..c0ac5a0f0 --- /dev/null +++ b/test_regress/t/t_type_comparison.pl @@ -0,0 +1,20 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2020 by Todd Strader. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_type_comparison.v b/test_regress/t/t_type_comparison.v new file mode 100644 index 000000000..ce957dd8c --- /dev/null +++ b/test_regress/t/t_type_comparison.v @@ -0,0 +1,49 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2020 by Todd Strader. + +module foo + #(parameter type a_type = logic, + parameter type b_type = int) + (); + + initial begin + if (type(a_type) != type(logic[7:0])) begin + $display("%%Error: a_type is wrong"); + $stop(); + end + + if (type(b_type) != type(real)) begin + $display("%%Error: b_type is wrong"); + $stop(); + end + + if (type(a_type) == type(logic)) begin + $display("%%Error: a_type is the default value"); + $stop(); + end + + if (type(b_type) == type(int)) begin + $display("%%Error: b_type is the default value"); + $stop(); + end + + if (type(a_type) == type(b_type)) begin + $display("%%Error: a_type equals b_type"); + $stop(); + end + + $write("*-* All Finished *-*\n"); + $finish; + end + +endmodule + +module t(); + + foo #( + .a_type (logic[7:0]), + .b_type (real)) the_foo (); + +endmodule