From 849c1e46a2768ee2a13210d255095e600e2fc305 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 8 Dec 2015 22:22:42 -0500
Subject: [PATCH] Fix  constant propagation, bug1012.

---
 Changes                      | 2 ++
 src/V3Number.cpp             | 8 ++++++--
 test_regress/t/t_math_real.v | 5 ++++-
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/Changes b/Changes
index 235c5687a..5e88ffba0 100644
--- a/Changes
+++ b/Changes
@@ -31,6 +31,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 ****  Fix error instead of warning on large concat, msg1768. [Paul Rolfe]
 
+****  Fix $bitstoreal constant propagation, bug1012. [Jonathan Kimmitt]
+
 
 * Verilator 3.878 2015-11-01
 
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index a240ccf9d..29d22dd33 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -1666,14 +1666,18 @@ V3Number& V3Number::opRealToBits (const V3Number& lhs) {
     if (lhs.width()!=64 || this->width()!=64) {
 	m_fileline->v3fatalSrc("Real operation on wrong sized number");
     }
-    return opAssign(lhs);
+    opAssign(lhs);
+    m_double = false;
+    return *this;
 }
 V3Number& V3Number::opBitsToRealD (const V3Number& lhs) {
     // Conveniently our internal format is identical so we can copy bits...
     if (lhs.width()!=64 || this->width()!=64) {
 	m_fileline->v3fatalSrc("Real operation on wrong sized number");
     }
-    return opAssign(lhs);
+    opAssign(lhs);
+    m_double = true;
+    return *this;
 }
 V3Number& V3Number::opNegateD (const V3Number& lhs) {
     return setDouble(- lhs.toDouble());
diff --git a/test_regress/t/t_math_real.v b/test_regress/t/t_math_real.v
index a72054b69..563ba223a 100644
--- a/test_regress/t/t_math_real.v
+++ b/test_regress/t/t_math_real.v
@@ -5,7 +5,7 @@
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
 
-`define is_near_real(a,b)  ($abs((a)-(b)) < (((a)/(b))*0.0001))
+`define is_near_real(a,b)  (( ((a)<(b)) ? (b)-(a) : (a)-(b)) < (((a)/(b))*0.0001))
 
 module t (/*AUTOARG*/
    // Inputs
@@ -78,6 +78,9 @@ module t (/*AUTOARG*/
       i=0;
       for (r=1.0; r<2.0; r=r+0.1) i++;
       if (i!=10) $stop;
+      // bug
+      r = $bitstoreal($realtobits(1.414));
+      if (r != 1.414) $stop;
    end
 
    // Test loop