From 51daa64e9a795f5efbc00890cb39c9a98a2cd6ab Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 31 Aug 2022 18:12:14 -0400 Subject: [PATCH 1/4] Fix --hierarchical with order-based pin connections (#3585). --- Changes | 6 +- src/V3LinkDot.cpp | 4 ++ test_regress/t/t_hier_bynum.v | 10 +-- test_regress/t/t_udp_bad.out | 6 +- test_regress/t/t_xml_first.out | 50 ++++++------- test_regress/t/t_xml_flat.out | 124 ++++++++++++++++----------------- 6 files changed, 102 insertions(+), 98 deletions(-) diff --git a/Changes b/Changes index bcbbbb381..b0e545ccd 100644 --- a/Changes +++ b/Changes @@ -14,6 +14,8 @@ Verilator 4.225 devel **Minor:** * Add --future0 and --future1 options. +* Improve Verilation speed with --threads on large designs. [Geza Lore] +* Rename trace rolloverSize() (#3570). * Fix incorrect bit op tree optimization (#3470). [algrobman] * Fix empty string arguments to display (#3484). [Grulfen] * Fix table misoptimizing away display (#3488). [Stefan Post] @@ -21,9 +23,7 @@ Verilator 4.225 devel * Fix incorrect tristate logic (#3399) [shareefj, Vighnesh Iyer] * Fix segfault exporting non-existant package (#3535). * Fix case statement comparing string literal (#3544). [Gustav Svensk] -* Fix --hierarchical with order-based pin connections (#3583). [Kelin9298] -* Improve Verilation speed with --threads on large designs. [Geza Lore] -* Rename trace rolloverSize() (#3570). +* Fix --hierarchical with order-based pin connections (#3583) (#3585). [Kelin9298] Verilator 4.224 2022-06-19 diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp index d84f80aba..02e6b439b 100644 --- a/src/V3LinkDot.cpp +++ b/src/V3LinkDot.cpp @@ -1500,6 +1500,10 @@ private: refp, nullptr /*classOrPackagep*/); symp->exported(false); refp->pinNum(nodep->pinNum()); + // Put the variable where the port is, so that variables stay + // in pin number sorted order. Otherwise hierarchical or XML + // may botch by-position instances. + nodep->addHereThisAsNext(refp->unlinkFrBack()); } // Ports not needed any more VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep); diff --git a/test_regress/t/t_hier_bynum.v b/test_regress/t/t_hier_bynum.v index 4f930143d..fe76f1e8f 100644 --- a/test_regress/t/t_hier_bynum.v +++ b/test_regress/t/t_hier_bynum.v @@ -3,11 +3,11 @@ // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2022 by Wilson Snyder. -module flop ( - output reg q, - input wire d, - input wire clk - ); +module flop (q, d, clk); + // No AUTOARG; order of below is different from port order above + input wire clk; + output reg q; + input wire d; // verilator hier_block diff --git a/test_regress/t/t_udp_bad.out b/test_regress/t/t_udp_bad.out index 4484513c6..8fb6190c9 100644 --- a/test_regress/t/t_udp_bad.out +++ b/test_regress/t/t_udp_bad.out @@ -9,10 +9,10 @@ %Error-PINNOTFOUND: t/t_udp_bad.v:10:13: Pin not found: '__pinNumber1' 10 | udp_x x (a, b); | ^ -%Error: t/t_udp_bad.v:15:9: Only inputs and outputs are allowed in udp modules - 15 | tri a_bad; - | ^~~~~ %Error: t/t_udp_bad.v:17:11: Multiple outputs not allowed in udp modules 17 | output c_bad; | ^~~~~ +%Error: t/t_udp_bad.v:15:9: Only inputs and outputs are allowed in udp modules + 15 | tri a_bad; + | ^~~~~ %Error: Exiting due to diff --git a/test_regress/t/t_xml_first.out b/test_regress/t/t_xml_first.out index 50968cab7..11cff436a 100644 --- a/test_regress/t/t_xml_first.out +++ b/test_regress/t/t_xml_first.out @@ -18,67 +18,67 @@ - - - - + + + + - + - + - + - + - + - + - - - - - - + + + + + + - - - + + + - + - - - + + + - - + + diff --git a/test_regress/t/t_xml_flat.out b/test_regress/t/t_xml_flat.out index eae232855..bc2e4f9b8 100644 --- a/test_regress/t/t_xml_flat.out +++ b/test_regress/t/t_xml_flat.out @@ -15,99 +15,99 @@ - - - - - - - + + + + + + + - - - + + + - - - + + + - - - - - - - + + + + + + + - - - + + + - - - - - - + + + + + + - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + - + - - - + + + - - - + + + - - - + + + - - - + + + - - - + + + - - + + From 592dab2bdbf4bbc1844c80098e3373dfc0bd1fd6 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 31 Aug 2022 19:27:43 -0400 Subject: [PATCH 2/4] Commentary: Changes update --- Changes | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/Changes b/Changes index b0e545ccd..27e8beee7 100644 --- a/Changes +++ b/Changes @@ -14,15 +14,30 @@ Verilator 4.225 devel **Minor:** * Add --future0 and --future1 options. -* Improve Verilation speed with --threads on large designs. [Geza Lore] +* Support class parameters (#2231) (#3541). [Arkadiusz Kozdra] +* Support wildcard index associative arrays (#3501). [Arkadiusz Kozdra] +* Support negated properties (#3572). [Aleksander Kiryk] +* Support $test$plusargs(expr) (#3489). * Rename trace rolloverSize() (#3570). +* Improve Verilation speed with --threads on large designs. [Geza Lore] +* Fix struct pattern assignment (#2328) (#3517). [Mostafa Gamal] +* Fix public combo propagation issues (#2905). [Todd Strader] +* Fix incorrect tristate logic (#3399) [shareefj, Vighnesh Iyer] * Fix incorrect bit op tree optimization (#3470). [algrobman] +* Fix bisonpre for MSYS2 (#3471). +* Fix max memory usage (#3483). [Kamil Rakoczy] * Fix empty string arguments to display (#3484). [Grulfen] * Fix table misoptimizing away display (#3488). [Stefan Post] +* Fix unique_ptr memory header for MinGW64 (#3493). +* Fix $dump systemtask with --output-split-cfuncs (#3495) (#3497). [Varun Koyyalagunta] * Fix wrong bit op tree optimization (#3509). [Nathan Graybeal] -* Fix incorrect tristate logic (#3399) [shareefj, Vighnesh Iyer] +* Fix nested default assignment for struct pattern (#3511) (#3524). [Mostafa Gamal] +* Fix sformat string incorrectly cleared (#3515) (#3519). [Gustav Svensk] * Fix segfault exporting non-existant package (#3535). +* Fix void-cast queue pop_front or pop_back (#3542) (#3364). [Drew Ranck] * Fix case statement comparing string literal (#3544). [Gustav Svensk] +* Fix === with some tristate constants (#3551). [Ryszard Rozak] +* Fix converting subclasses to string (#3552). [Arkadiusz Kozdra] * Fix --hierarchical with order-based pin connections (#3583) (#3585). [Kelin9298] From 5b2fbf4f3723328f69fbb4cc223665343a1b69b3 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 31 Aug 2022 19:46:45 -0400 Subject: [PATCH 3/4] Version bump --- Changes | 18 +++++++++--------- configure.ac | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/Changes b/Changes index 27e8beee7..98f97de74 100644 --- a/Changes +++ b/Changes @@ -8,14 +8,14 @@ The changes in each Verilator version are described below. The contributors that suggested a given feature are shown in []. Thanks! -Verilator 4.225 devel +Verilator 4.226 2022-08-31 ========================== **Minor:** * Add --future0 and --future1 options. -* Support class parameters (#2231) (#3541). [Arkadiusz Kozdra] -* Support wildcard index associative arrays (#3501). [Arkadiusz Kozdra] +* Support class parameters (#2231) (#3541). [Arkadiusz Kozdra/Antmicro] +* Support wildcard index associative arrays (#3501). [Arkadiusz Kozdra/Antmicro] * Support negated properties (#3572). [Aleksander Kiryk] * Support $test$plusargs(expr) (#3489). * Rename trace rolloverSize() (#3570). @@ -37,7 +37,7 @@ Verilator 4.225 devel * Fix void-cast queue pop_front or pop_back (#3542) (#3364). [Drew Ranck] * Fix case statement comparing string literal (#3544). [Gustav Svensk] * Fix === with some tristate constants (#3551). [Ryszard Rozak] -* Fix converting subclasses to string (#3552). [Arkadiusz Kozdra] +* Fix converting subclasses to string (#3552). [Arkadiusz Kozdra/Antmicro] * Fix --hierarchical with order-based pin connections (#3583) (#3585). [Kelin9298] @@ -59,7 +59,7 @@ Verilator 4.224 2022-06-19 * Improve conditional merging optimization (#3125). [Geza Lore, Shunyao CAD] * Define VM_TRACE_VCD when tracing in VCD format. [Geza Lore, Shunyao CAD] * Add assert when VerilatedContext is mis-deleted (#3121). [Rupert Swarbrick] -* Internal prep work towards timing control. [Krzysztof Bieganski] +* Internal prep work towards timing control. [Krzysztof Bieganski/Antmicro] * Fix hang with large case statement optimization (#3405). [Mike Urbach] * Fix UNOPTFLAT warning from initial static var (#3406). [Kamil Rakoczy] * Fix compile error when enable VL_LEAK_CHECKS (#3411). [HungMingWu] @@ -226,7 +226,7 @@ Verilator 4.212 2021-09-01 * Fix re-evaluation of logic dependent on state set in DPI exports (#3091). [Geza Lore] * Support unpacked array localparams in tasks/functions (#3078). [Geza Lore] * Support timeunit/timeprecision in $unit. -* Support assignment patterns as children of pins (#3041). [Krzysztof Bieganski] +* Support assignment patterns as children of pins (#3041). [Krzysztof Bieganski/Antmicro] * Add --instr-count-dpi to tune assumed DPI import cost for multithreaded model scheduling. Default value changed to 200 (#3068). [Yinan Xu] * Output files are split based on the set of headers required @@ -291,7 +291,7 @@ Verilator 4.204 2021-06-12 * Prep work towards better ccache hashing/performance. [Geza Lore] * Fix assertion failure in bitOpTree optimization (#2891) (#2899). [Raynard Qiao] * Fix DPI functions not seen as vpiModule (#2893). [Todd Strader] -* Fix bounds check in VL_SEL_IWII (#2910). [Krzysztof Bieganski] +* Fix bounds check in VL_SEL_IWII (#2910). [Krzysztof Bieganski/Antmicro] * Fix slowdown in elaboration (#2911). [Nathan Graybeal] * Fix initialization of assoc in assoc array (#2914). [myftptoyman] * Fix make support for gmake 3.x (#2920) (#2921). [Philipp Wagner] @@ -406,7 +406,7 @@ Verilator 4.108 2021-01-10 **Major:** * Many VPI changes for IEEE compatibility, which may alter behavior from previous releases. -* Support randomize() class method and rand (#2607). [Krzysztof Bieganski] +* Support randomize() class method and rand (#2607). [Krzysztof Bieganski/Antmicro] **Minor:** @@ -466,7 +466,7 @@ Verilator 4.104 2020-11-14 * Support queue and associative array 'with' statements (#2616). * Support queue slicing (#2326). * Support associative array pattern assignments and defaults. -* Support static methods and typedefs in classes (#2615). [Krzysztof Bieganski] +* Support static methods and typedefs in classes (#2615). [Krzysztof Bieganski/Antmicro] * Add error on typedef referencing self (#2539). [Cody Piersall] * With --debug, turn off address space layout randomization. * Fix iteration over mutating list bug in VPI (#2588). [Kaleb Barrett] diff --git a/configure.ac b/configure.ac index b3d2e47e5..c7ef7c1be 100644 --- a/configure.ac +++ b/configure.ac @@ -10,7 +10,7 @@ # Then 'make maintainer-dist' #AC_INIT([Verilator],[#.### YYYY-MM-DD]) #AC_INIT([Verilator],[#.### devel]) -AC_INIT([Verilator],[4.225 devel], +AC_INIT([Verilator],[4.226 2022-08-31], [https://verilator.org], [verilator],[https://verilator.org]) From 8d0c06e5704352799bf45853af0ad5fb965f3b8c Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 31 Aug 2022 19:49:24 -0400 Subject: [PATCH 4/4] devel release --- Changes | 6 ++++++ configure.ac | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/Changes b/Changes index 98f97de74..3cb14209e 100644 --- a/Changes +++ b/Changes @@ -8,6 +8,12 @@ The changes in each Verilator version are described below. The contributors that suggested a given feature are shown in []. Thanks! +Verilator 4.227 devel +========================== + +**Minor:** + + Verilator 4.226 2022-08-31 ========================== diff --git a/configure.ac b/configure.ac index c7ef7c1be..7caacbd45 100644 --- a/configure.ac +++ b/configure.ac @@ -10,7 +10,7 @@ # Then 'make maintainer-dist' #AC_INIT([Verilator],[#.### YYYY-MM-DD]) #AC_INIT([Verilator],[#.### devel]) -AC_INIT([Verilator],[4.226 2022-08-31], +AC_INIT([Verilator],[4.227 devel], [https://verilator.org], [verilator],[https://verilator.org])