forked from github/verilator
Merge branch 'master' into develop-v5
This commit is contained in:
Geza Lore
commit
766fb56651
1
Changes
1
Changes
@ -21,6 +21,7 @@ Verilator 4.223 devel
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**Minor:**
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* Support compile time trace signal selection with tracing_on/off (#3323). [Shunyao CAD]
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* Fix hang with large case statement optimization (#3405). [Mike Urbach]
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@ -71,6 +71,7 @@ Markus Krause
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Marlon James
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Marshal Qiao
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Martin Schmidt
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Martin Stadler
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Matthew Ballance
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Michael Killough
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Michaël Lefebvre
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@ -1676,9 +1676,28 @@ The grammar of configuration commands is as follows:
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.. option:: tracing_off [-file "<filename>" [-lines <line> [ - <line> ]]]
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Enable/disable waveform tracing for all future signals declared in the
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specified filename (or wildcard with '\*' or '?', or all files if
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omitted) and range of line numbers (or all lines if omitted).
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.. option:: tracing_on [-scope "<scopename>" [-levels <levels> ]]
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For tracing_off, instances below any module in the files/ranges
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specified will also not be traced.
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.. option:: tracing_off [-scope "<scopename>" [-levels <levels> ]]
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Enable/disable waveform tracing for all future signals declared in
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all files.
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With -file, enable/disable waveform tracing in the specified
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filename (or wildcard with '\*' or '?'), and -line range of line
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numbers (or all lines if omitted).
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For tracing_off with -file, instances below any module in the
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files/ranges specified will also not be traced. To overcome this
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feature, use tracing_on on the upper module declaration and on any
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cells, or use the -scope flavor of the command.
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With -scope enable/disable waveform tracing for the specified scope (or
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wildcard with '\*' or '?'), and optional --levels number of levels
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below. These controls only take place after other file/line/module
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based controls have indicated the signal should be traced.
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With -levels (used with -scope), the number of levels below that
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scope which the rule is to match, where 0 means all levels below, 1
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the exact level as the provided scope, and 2 meaning an additional
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level of children below the provided scope, etc.
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@ -103,7 +103,7 @@ private:
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using ItemList = std::deque<VerilatedCovImpItem*>;
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// MEMBERS
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VerilatedMutex m_mutex; // Protects all members
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mutable VerilatedMutex m_mutex; // Protects all members
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ValueIndexMap m_valueIndexes VL_GUARDED_BY(m_mutex); // Unique arbitrary value for values
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IndexValueMap m_indexValues VL_GUARDED_BY(m_mutex); // Unique arbitrary value for keys
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ItemList m_items VL_GUARDED_BY(m_mutex); // List of all items
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@ -157,8 +157,8 @@ protected:
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friend class VerilatedCovImp;
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// CONSTRUCTORS
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// Internal: Only made as part of VerilatedCovImp
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VerilatedCovContext() {}
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virtual ~VerilatedCovContext() {}
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VerilatedCovContext() = default;
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virtual ~VerilatedCovContext() = default;
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// METHODS
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// Internal: access to implementation class
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@ -91,7 +91,7 @@ class VerilatedEvalMsgQueue final {
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std::atomic<uint64_t> m_depth; // Current depth of queue (see comments below)
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VerilatedMutex m_mutex; // Mutex protecting queue
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mutable VerilatedMutex m_mutex; // Mutex protecting queue
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VerilatedThreadQueue m_queue VL_GUARDED_BY(m_mutex); // Message queue
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public:
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// CONSTRUCTORS
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@ -155,7 +155,7 @@ class VlExecutionProfiler final {
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// STATE
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static VL_THREAD_LOCAL ExecutionTrace t_trace; // thread-local trace buffers
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VerilatedMutex m_mutex;
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mutable VerilatedMutex m_mutex;
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// Map from thread id to &t_trace of given thread
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std::map<uint32_t, ExecutionTrace*> m_traceps VL_GUARDED_BY(m_mutex);
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@ -150,7 +150,7 @@ private:
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};
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// MEMBERS
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VerilatedMutex m_mutex;
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mutable VerilatedMutex m_mutex;
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std::condition_variable_any m_cv;
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// Only notify the condition_variable if the worker is waiting
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bool m_waiting VL_GUARDED_BY(m_mutex) = false;
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@ -47,7 +47,7 @@
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// A simple synchronized first in first out queue
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template <class T> class VerilatedThreadQueue final { // LCOV_EXCL_LINE // lcov bug
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private:
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VerilatedMutex m_mutex; // Protects m_queue
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mutable VerilatedMutex m_mutex; // Protects m_queue
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std::condition_variable_any m_cv;
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std::deque<T> m_queue VL_GUARDED_BY(m_mutex);
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@ -208,7 +208,7 @@ protected:
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//=========================================================================
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// Internals available to format specific implementations
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VerilatedMutex m_mutex; // Ensure dump() etc only called from single thread
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mutable VerilatedMutex m_mutex; // Ensure dump() etc only called from single thread
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uint32_t nextCode() const { return m_nextCode; }
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uint32_t numSignals() const { return m_numSignals; }
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@ -317,7 +317,7 @@ public:
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iterate(nodep);
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m_graph.latchCheck(nodep, kwd == VAlwaysKwd::ALWAYS_LATCH);
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}
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virtual ~ActiveLatchCheckVisitor() {}
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virtual ~ActiveLatchCheckVisitor() = default;
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};
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//######################################################################
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@ -758,7 +758,7 @@ void AstNode::deleteTree() {
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#ifdef VL_LEAK_CHECKS
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void* AstNode::operator new(size_t size) {
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// Optimization note: Aligning to cache line is a loss, due to lost packing
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const AstNode* const objp = static_cast<AstNode*>(::operator new(size));
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AstNode* const objp = static_cast<AstNode*>(::operator new(size));
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V3Broken::addNewed(objp);
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return objp;
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}
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133
src/V3Config.cpp
133
src/V3Config.cpp
@ -44,13 +44,8 @@ public:
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/// Update into maps from other
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void update(const V3ConfigWildcardResolver& other) {
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typename Map::const_iterator it;
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for (it = other.m_mapResolved.begin(); it != other.m_mapResolved.end(); ++it) {
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m_mapResolved[it->first].update(it->second);
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}
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for (it = other.m_mapWildcard.begin(); it != other.m_mapWildcard.end(); ++it) {
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m_mapWildcard[it->first].update(it->second);
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}
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for (const auto& itr : other.m_mapResolved) m_mapResolved[itr.first].update(itr.second);
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for (const auto& itr : other.m_mapWildcard) m_mapWildcard[itr.first].update(itr.second);
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}
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// Access and create a (wildcard) entity
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@ -68,12 +63,12 @@ public:
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// Cannot be resolved, create if matched
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// Update this entity with all matches in the wildcards
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for (it = m_mapWildcard.begin(); it != m_mapWildcard.end(); ++it) {
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if (VString::wildmatch(name, it->first)) {
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for (const auto& wildent : m_mapWildcard) {
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if (VString::wildmatch(name, wildent.first)) {
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if (!newp) {
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newp = &m_mapResolved[name]; // Emplace and get pointer
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}
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newp->update(it->second);
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newp->update(wildent.second);
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}
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}
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return newp;
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@ -198,8 +193,8 @@ public:
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AstNode* const nodep = new AstPragma(modp->fileline(), type);
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modp->addStmtp(nodep);
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}
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for (auto it = m_modPragmas.cbegin(); it != m_modPragmas.cend(); ++it) {
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AstNode* const nodep = new AstPragma(modp->fileline(), *it);
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for (const auto& itr : m_modPragmas) {
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AstNode* const nodep = new AstPragma{modp->fileline(), itr};
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modp->addStmtp(nodep);
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}
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}
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@ -344,25 +339,124 @@ public:
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using V3ConfigFileResolver = V3ConfigWildcardResolver<V3ConfigFile>;
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//######################################################################
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// ScopeTrace tracking
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class V3ConfigScopeTraceEntry final {
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public:
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const string m_scope; // Scope or regexp to match
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const bool m_on = false; // True to enable message
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int m_levels = 0; // # levels, 0 = all, 1 = only this, ...
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// CONSTRUCTORS
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V3ConfigScopeTraceEntry(const string& scope, bool on, int levels)
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: m_scope{scope}
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, m_on{on}
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, m_levels{levels} {}
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~V3ConfigScopeTraceEntry() = default;
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bool operator<(const V3ConfigScopeTraceEntry& other) const {
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if (m_on < other.m_on) return true;
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if (m_on > other.m_on) return false;
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if (m_levels < other.m_levels) return true;
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if (m_levels > other.m_levels) return false;
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return m_scope < other.m_scope;
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}
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};
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// Tracks what matches are known to hit against V3ConfigScopeTraceEntries
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class V3ConfigScopeTraceEntryMatch final {
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public:
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const V3ConfigScopeTraceEntry* m_entryp;
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const string m_scopepart;
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V3ConfigScopeTraceEntryMatch(const V3ConfigScopeTraceEntry* entryp, const string& scopepart)
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: m_entryp{entryp}
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, m_scopepart{scopepart} {}
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bool operator<(const V3ConfigScopeTraceEntryMatch& other) const {
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if (m_entryp < other.m_entryp) return true;
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if (m_entryp > other.m_entryp) return false;
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return m_scopepart < other.m_scopepart;
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}
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};
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class V3ConfigScopeTraceResolver final {
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std::vector<V3ConfigScopeTraceEntry> m_entries; // User specified on/offs and levels
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std::map<V3ConfigScopeTraceEntryMatch, bool> m_matchCache; // Matching entries for speed
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public:
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void addScopeTraceOn(bool on, const string& scope, int levels) {
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UINFO(9, "addScopeTraceOn " << on << " '" << scope << "' "
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<< " levels=" << levels << endl);
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m_entries.emplace_back(V3ConfigScopeTraceEntry{scope, on, levels});
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m_matchCache.clear();
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}
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bool getEntryMatch(const V3ConfigScopeTraceEntry* entp, const string& scopepart) {
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// Return if a entry matches the scopepart, with memoization
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const auto& key = V3ConfigScopeTraceEntryMatch{entp, scopepart};
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const auto& it = m_matchCache.find(key);
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if (it != m_matchCache.end()) return it->second; // Cached
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const bool matched = VString::wildmatch(scopepart, entp->m_scope);
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m_matchCache.emplace(key, matched);
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return matched;
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}
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bool getScopeTraceOn(const string& scope) {
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// Apply in the order the user provided them, so they can choose on/off preferencing
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int maxLevel = 1;
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for (const auto& ch : scope) {
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if (ch == '.') ++maxLevel;
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}
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UINFO(9, "getScopeTraceOn " << scope << " maxLevel=" << maxLevel << endl);
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bool enabled = true;
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for (const auto& ent : m_entries) {
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// We apply shortest match first for each rule component
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// (Otherwise the levels would be useless as "--scope top* --levels 1" would
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// always match at every scopepart, and we wound't know how to count levels)
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int partLevel = 1;
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for (string::size_type partEnd = 0; true;) {
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partEnd = scope.find('.', partEnd + 1);
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if (partEnd == string::npos) partEnd = scope.length();
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const std::string scopepart = scope.substr(0, partEnd);
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if (getEntryMatch(&ent, scopepart)) {
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const bool levelMatch
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= !ent.m_levels || (ent.m_levels >= maxLevel - partLevel);
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if (levelMatch) enabled = ent.m_on;
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UINFO(9, "getScopeTraceOn-part " << scope << " enabled=" << enabled
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<< " @ lev=" << partLevel
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<< (levelMatch ? "[match]" : "[miss]")
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<< " from scopepart=" << scopepart << endl);
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break;
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}
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if (partEnd == scope.length()) break;
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++partLevel;
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}
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}
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return enabled;
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}
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};
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//######################################################################
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// Resolve modules and files in the design
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class V3ConfigResolver final {
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V3ConfigModuleResolver m_modules; // Access to module names (with wildcards)
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V3ConfigFileResolver m_files; // Access to file names (with wildcards)
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V3ConfigScopeTraceResolver m_scopeTraces; // Regexp to trace enables
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std::unordered_map<string, std::unordered_map<string, uint64_t>>
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m_profileData; // Access to profile_data records
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FileLine* m_profileFileLine = nullptr;
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static V3ConfigResolver s_singleton; // Singleton (not via local static, as that's slow)
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V3ConfigResolver() = default;
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~V3ConfigResolver() = default;
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public:
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static V3ConfigResolver& s() { return s_singleton; }
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|
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static V3ConfigResolver& s() {
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static V3ConfigResolver s_singleton;
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return s_singleton;
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}
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V3ConfigModuleResolver& modules() { return m_modules; }
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V3ConfigFileResolver& files() { return m_files; }
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V3ConfigScopeTraceResolver& scopeTraces() { return m_scopeTraces; }
|
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|
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void addProfileData(FileLine* fl, const string& model, const string& key, uint64_t cost) {
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if (!m_profileFileLine) m_profileFileLine = fl;
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@ -379,8 +473,6 @@ public:
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FileLine* getProfileDataFileLine() const { return m_profileFileLine; } // Maybe null
|
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};
|
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|
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V3ConfigResolver V3ConfigResolver::s_singleton;
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|
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//######################################################################
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// V3Config
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|
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@ -434,6 +526,10 @@ void V3Config::addProfileData(FileLine* fl, const string& model, const string& k
|
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V3ConfigResolver::s().addProfileData(fl, model, key, cost);
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}
|
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|
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void V3Config::addScopeTraceOn(bool on, const string& scope, int levels) {
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V3ConfigResolver::s().scopeTraces().addScopeTraceOn(on, scope, levels);
|
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}
|
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|
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void V3Config::addVarAttr(FileLine* fl, const string& module, const string& ftask,
|
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const string& var, VAttrType attr, AstSenTree* sensep) {
|
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// Semantics: sensep only if public_flat_rw
|
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@ -540,6 +636,9 @@ uint64_t V3Config::getProfileData(const string& model, const string& key) {
|
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FileLine* V3Config::getProfileDataFileLine() {
|
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return V3ConfigResolver::s().getProfileDataFileLine();
|
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}
|
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bool V3Config::getScopeTraceOn(const string& scope) {
|
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return V3ConfigResolver::s().scopeTraces().getScopeTraceOn(scope);
|
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}
|
||||
|
||||
bool V3Config::waive(FileLine* filelinep, V3ErrorCode code, const string& message) {
|
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V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filelinep->filename());
|
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|
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@ -37,19 +37,21 @@ public:
|
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static void addModulePragma(const string& module, VPragmaType pragma);
|
||||
static void addProfileData(FileLine* fl, const string& model, const string& key,
|
||||
uint64_t cost);
|
||||
static void addWaiver(V3ErrorCode code, const string& filename, const string& message);
|
||||
static void addScopeTraceOn(bool on, const string& scope, int levels);
|
||||
static void addVarAttr(FileLine* fl, const string& module, const string& ftask,
|
||||
const string& signal, VAttrType type, AstSenTree* nodep);
|
||||
static void addWaiver(V3ErrorCode code, const string& filename, const string& message);
|
||||
|
||||
static void applyCase(AstCase* nodep);
|
||||
static void applyCoverageBlock(AstNodeModule* modulep, AstBegin* nodep);
|
||||
static void applyFTask(AstNodeModule* modulep, AstNodeFTask* ftaskp);
|
||||
static void applyIgnores(FileLine* filelinep);
|
||||
static void applyModule(AstNodeModule* modulep);
|
||||
static void applyFTask(AstNodeModule* modulep, AstNodeFTask* ftaskp);
|
||||
static void applyVarAttr(AstNodeModule* modulep, AstNodeFTask* ftaskp, AstVar* varp);
|
||||
|
||||
static uint64_t getProfileData(const string& model, const string& key);
|
||||
static FileLine* getProfileDataFileLine();
|
||||
static bool getScopeTraceOn(const string& scope);
|
||||
static bool waive(FileLine* filelinep, V3ErrorCode code, const string& message);
|
||||
};
|
||||
|
||||
|
||||
@ -25,9 +25,10 @@
|
||||
#include "verilated_trace_defs.h" // For VLT_TRACE_SCOPE_*
|
||||
|
||||
#include "V3Global.h"
|
||||
#include "V3TraceDecl.h"
|
||||
#include "V3Config.h"
|
||||
#include "V3EmitCBase.h"
|
||||
#include "V3Stats.h"
|
||||
#include "V3TraceDecl.h"
|
||||
|
||||
#include <algorithm>
|
||||
#include <functional>
|
||||
@ -140,10 +141,13 @@ private:
|
||||
return "Verilator trace_off";
|
||||
} else if (!nodep->isTrace()) {
|
||||
return "Verilator instance trace_off";
|
||||
} else if (!v3Global.opt.traceUnderscore()) {
|
||||
} else {
|
||||
const string prettyName = varp->prettyName();
|
||||
if (!prettyName.empty() && prettyName[0] == '_') return "Leading underscore";
|
||||
if (prettyName.find("._") != string::npos) return "Inlined leading underscore";
|
||||
if (!v3Global.opt.traceUnderscore()) {
|
||||
if (!prettyName.empty() && prettyName[0] == '_') return "Leading underscore";
|
||||
if (prettyName.find("._") != string::npos) return "Inlined leading underscore";
|
||||
}
|
||||
if (!V3Config::getScopeTraceOn(prettyName)) return "Vlt scope trace_off";
|
||||
}
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
@ -138,12 +138,14 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
|
||||
-?"-cost" { FL; return yVLT_D_COST; }
|
||||
-?"-file" { FL; return yVLT_D_FILE; }
|
||||
-?"-function" { FL; return yVLT_D_FUNCTION; }
|
||||
-?"-levels" { FL; return yVLT_D_LEVELS; }
|
||||
-?"-lines" { FL; return yVLT_D_LINES; }
|
||||
-?"-match" { FL; return yVLT_D_MATCH; }
|
||||
-?"-model" { FL; return yVLT_D_MODEL; }
|
||||
-?"-module" { FL; return yVLT_D_MODULE; }
|
||||
-?"-mtask" { FL; return yVLT_D_MTASK; }
|
||||
-?"-rule" { FL; return yVLT_D_RULE; }
|
||||
-?"-scope" { FL; return yVLT_D_SCOPE; }
|
||||
-?"-task" { FL; return yVLT_D_TASK; }
|
||||
-?"-var" { FL; return yVLT_D_VAR; }
|
||||
|
||||
|
||||
9001
src/verilog.y
9001
src/verilog.y
File diff suppressed because it is too large
Load Diff
@ -40,7 +40,7 @@ public:
|
||||
__LINE__, m_info.product);
|
||||
}
|
||||
}
|
||||
~TestSimulator() {}
|
||||
~TestSimulator() = default;
|
||||
// METHORS
|
||||
private:
|
||||
static TestSimulator& singleton() {
|
||||
|
||||
@ -9,8 +9,8 @@
|
||||
class t_extend_class_c {
|
||||
public:
|
||||
// CONSTRUCTORS
|
||||
t_extend_class_c() {}
|
||||
~t_extend_class_c() {}
|
||||
t_extend_class_c() = default;
|
||||
~t_extend_class_c() = default;
|
||||
// METHODS
|
||||
// This function will be called from a instance created in Verilog
|
||||
inline uint32_t my_math(uint32_t in) { return in + 1; }
|
||||
|
||||
157
test_regress/t/t_trace_scope_vlt.out
Normal file
157
test_regress/t/t_trace_scope_vlt.out
Normal file
@ -0,0 +1,157 @@
|
||||
$version Generated by VerilatedVcd $end
|
||||
$date Thu May 12 22:13:21 2022 $end
|
||||
$timescale 1ps $end
|
||||
|
||||
$scope module top $end
|
||||
$var wire 1 ) clk $end
|
||||
$scope module t $end
|
||||
$var wire 1 ) clk $end
|
||||
$scope module sub1a $end
|
||||
$var wire 32 * ADD [31:0] $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$var wire 32 $ value [31:0] $end
|
||||
$upscope $end
|
||||
$scope module sub1b $end
|
||||
$var wire 32 + ADD [31:0] $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$var wire 32 % value [31:0] $end
|
||||
$scope module sub2a $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$var wire 32 & value [31:0] $end
|
||||
$upscope $end
|
||||
$scope module sub2b $end
|
||||
$var wire 32 , ADD [31:0] $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$var wire 32 ' value [31:0] $end
|
||||
$upscope $end
|
||||
$scope module sub2c $end
|
||||
$var wire 32 - ADD [31:0] $end
|
||||
$var wire 32 # cyc [31:0] $end
|
||||
$var wire 32 ( value [31:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
|
||||
|
||||
#0
|
||||
b00000000000000000000000000000000 #
|
||||
b00000000000000000000000000001010 $
|
||||
b00000000000000000000000000010100 %
|
||||
b00000000000000000000000000010101 &
|
||||
b00000000000000000000000000010110 '
|
||||
b00000000000000000000000000010111 (
|
||||
0)
|
||||
b00000000000000000000000000001010 *
|
||||
b00000000000000000000000000010100 +
|
||||
b00000000000000000000000000010110 ,
|
||||
b00000000000000000000000000010111 -
|
||||
#10
|
||||
b00000000000000000000000000000001 #
|
||||
b00000000000000000000000000001011 $
|
||||
b00000000000000000000000000010101 %
|
||||
b00000000000000000000000000010110 &
|
||||
b00000000000000000000000000010111 '
|
||||
b00000000000000000000000000011000 (
|
||||
1)
|
||||
#15
|
||||
0)
|
||||
#20
|
||||
b00000000000000000000000000000010 #
|
||||
b00000000000000000000000000001100 $
|
||||
b00000000000000000000000000010110 %
|
||||
b00000000000000000000000000010111 &
|
||||
b00000000000000000000000000011000 '
|
||||
b00000000000000000000000000011001 (
|
||||
1)
|
||||
#25
|
||||
0)
|
||||
#30
|
||||
b00000000000000000000000000000011 #
|
||||
b00000000000000000000000000001101 $
|
||||
b00000000000000000000000000010111 %
|
||||
b00000000000000000000000000011000 &
|
||||
b00000000000000000000000000011001 '
|
||||
b00000000000000000000000000011010 (
|
||||
1)
|
||||
#35
|
||||
0)
|
||||
#40
|
||||
b00000000000000000000000000000100 #
|
||||
b00000000000000000000000000001110 $
|
||||
b00000000000000000000000000011000 %
|
||||
b00000000000000000000000000011001 &
|
||||
b00000000000000000000000000011010 '
|
||||
b00000000000000000000000000011011 (
|
||||
1)
|
||||
#45
|
||||
0)
|
||||
#50
|
||||
b00000000000000000000000000000101 #
|
||||
b00000000000000000000000000001111 $
|
||||
b00000000000000000000000000011001 %
|
||||
b00000000000000000000000000011010 &
|
||||
b00000000000000000000000000011011 '
|
||||
b00000000000000000000000000011100 (
|
||||
1)
|
||||
#55
|
||||
0)
|
||||
#60
|
||||
b00000000000000000000000000000110 #
|
||||
b00000000000000000000000000010000 $
|
||||
b00000000000000000000000000011010 %
|
||||
b00000000000000000000000000011011 &
|
||||
b00000000000000000000000000011100 '
|
||||
b00000000000000000000000000011101 (
|
||||
1)
|
||||
#65
|
||||
0)
|
||||
#70
|
||||
b00000000000000000000000000000111 #
|
||||
b00000000000000000000000000010001 $
|
||||
b00000000000000000000000000011011 %
|
||||
b00000000000000000000000000011100 &
|
||||
b00000000000000000000000000011101 '
|
||||
b00000000000000000000000000011110 (
|
||||
1)
|
||||
#75
|
||||
0)
|
||||
#80
|
||||
b00000000000000000000000000001000 #
|
||||
b00000000000000000000000000010010 $
|
||||
b00000000000000000000000000011100 %
|
||||
b00000000000000000000000000011101 &
|
||||
b00000000000000000000000000011110 '
|
||||
b00000000000000000000000000011111 (
|
||||
1)
|
||||
#85
|
||||
0)
|
||||
#90
|
||||
b00000000000000000000000000001001 #
|
||||
b00000000000000000000000000010011 $
|
||||
b00000000000000000000000000011101 %
|
||||
b00000000000000000000000000011110 &
|
||||
b00000000000000000000000000011111 '
|
||||
b00000000000000000000000000100000 (
|
||||
1)
|
||||
#95
|
||||
0)
|
||||
#100
|
||||
b00000000000000000000000000001010 #
|
||||
b00000000000000000000000000010100 $
|
||||
b00000000000000000000000000011110 %
|
||||
b00000000000000000000000000011111 &
|
||||
b00000000000000000000000000100000 '
|
||||
b00000000000000000000000000100001 (
|
||||
1)
|
||||
#105
|
||||
0)
|
||||
#110
|
||||
b00000000000000000000000000001011 #
|
||||
b00000000000000000000000000010101 $
|
||||
b00000000000000000000000000011111 %
|
||||
b00000000000000000000000000100000 &
|
||||
b00000000000000000000000000100001 '
|
||||
b00000000000000000000000000100010 (
|
||||
1)
|
||||
26
test_regress/t/t_trace_scope_vlt.pl
Executable file
26
test_regress/t/t_trace_scope_vlt.pl
Executable file
@ -0,0 +1,26 @@
|
||||
#!/usr/bin/env perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you
|
||||
# can redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
|
||||
|
||||
scenarios(vlt_all => 1);
|
||||
|
||||
top_filename("t/t_trace_scope_vlt.v");
|
||||
|
||||
compile(
|
||||
v_flags2 => ["--trace t/t_trace_scope_vlt.vlt"],
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
vcd_identical("$Self->{obj_dir}/simx.vcd", $Self->{golden_filename});
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
42
test_regress/t/t_trace_scope_vlt.v
Normal file
42
test_regress/t/t_trace_scope_vlt.v
Normal file
@ -0,0 +1,42 @@
|
||||
// DESCRIPTION: Verilator: Verilog Test module
|
||||
//
|
||||
// This file ONLY is placed under the Creative Commons Public Domain, for
|
||||
// any use, without warranty, 2022 by Wilson Snyder.
|
||||
// SPDX-License-Identifier: CC0-1.0
|
||||
|
||||
module t (/*AUTOARG*/
|
||||
// Inputs
|
||||
clk
|
||||
);
|
||||
|
||||
input clk;
|
||||
int cyc;
|
||||
|
||||
sub1 #(10) sub1a (.*);
|
||||
sub1 #(20) sub1b (.*);
|
||||
|
||||
always @ (posedge clk) begin
|
||||
cyc <= cyc + 1;
|
||||
if (cyc == 10) begin
|
||||
$write("*-* All Finished *-*\n");
|
||||
$finish;
|
||||
end
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
||||
module sub1 #(parameter int ADD)
|
||||
(input int cyc);
|
||||
|
||||
wire int value = cyc + ADD;
|
||||
|
||||
sub2 #(ADD + 1) sub2a(.*);
|
||||
sub2 #(ADD + 2) sub2b(.*);
|
||||
sub2 #(ADD + 3) sub2c(.*);
|
||||
endmodule
|
||||
|
||||
module sub2 #(parameter int ADD)
|
||||
(input int cyc);
|
||||
|
||||
wire int value = cyc + ADD;
|
||||
endmodule
|
||||
13
test_regress/t/t_trace_scope_vlt.vlt
Normal file
13
test_regress/t/t_trace_scope_vlt.vlt
Normal file
@ -0,0 +1,13 @@
|
||||
// DESCRIPTION: Verilator: Verilog Test module
|
||||
//
|
||||
// This file ONLY is placed into the Public Domain, for any use,
|
||||
// without warranty, 2022 by Wilson Snyder.
|
||||
// SPDX-License-Identifier: CC0-1.0
|
||||
|
||||
`verilator_config
|
||||
|
||||
tracing_off -scope "t*" -levels 0
|
||||
tracing_on -scope "t.clk"
|
||||
tracing_on -scope "t.sub1a" -levels 1
|
||||
tracing_on -scope "t.sub1b" -levels 2
|
||||
tracing_off -scope "*.sub2a.ADD"
|
||||
@ -1,7 +1,22 @@
|
||||
%Error: t/t_vlt_syntax_bad.vlt:9:20: sensitivity not expected for attribute
|
||||
9 | public -module "t" @(posedge clk)
|
||||
| ^
|
||||
%Error: t/t_vlt_syntax_bad.vlt:10:1: isolate_assignments only applies to signals or functions/tasks
|
||||
10 | isolate_assignments -module "t"
|
||||
%Error: t/t_vlt_syntax_bad.vlt:11:1: isolate_assignments only applies to signals or functions/tasks
|
||||
11 | isolate_assignments -module "t"
|
||||
| ^~~~~~~~~~~~~~~~~~~
|
||||
%Error: t/t_vlt_syntax_bad.vlt:13:1: Argument -match only supported for lint_off
|
||||
13 | tracing_off --file "*" -match "nothing"
|
||||
| ^~~~~~~~~~~
|
||||
%Error: t/t_vlt_syntax_bad.vlt:15:1: Argument -scope only supported for tracing_on/off
|
||||
15 | lint_off --rule UNOPTFLAT -scope "top*"
|
||||
| ^~~~~~~~
|
||||
%Error: t/t_vlt_syntax_bad.vlt:16:1: Argument -scope only supported for tracing_on/off_off
|
||||
16 | lint_off --rule UNOPTFLAT -scope "top*" -levels 0
|
||||
| ^~~~~~~~
|
||||
%Error: t/t_vlt_syntax_bad.vlt:17:1: Argument -scope only supported for tracing_on/off
|
||||
17 | lint_on --rule UNOPTFLAT -scope "top*"
|
||||
| ^~~~~~~
|
||||
%Error: t/t_vlt_syntax_bad.vlt:18:1: Argument -scope only supported for tracing_on/off_off
|
||||
18 | lint_on --rule UNOPTFLAT -scope "top*" -levels 0
|
||||
| ^~~~~~~
|
||||
%Error: Exiting due to
|
||||
|
||||
@ -7,4 +7,12 @@
|
||||
`verilator_config
|
||||
|
||||
public -module "t" @(posedge clk)
|
||||
// only signals/functions/tasks
|
||||
isolate_assignments -module "t"
|
||||
// -match not supported
|
||||
tracing_off --file "*" -match "nothing"
|
||||
// -scope not supported
|
||||
lint_off --rule UNOPTFLAT -scope "top*"
|
||||
lint_off --rule UNOPTFLAT -scope "top*" -levels 0
|
||||
lint_on --rule UNOPTFLAT -scope "top*"
|
||||
lint_on --rule UNOPTFLAT -scope "top*" -levels 0
|
||||
|
||||
@ -334,9 +334,14 @@ function(verilate TARGET)
|
||||
|
||||
target_link_libraries(${TARGET} PUBLIC
|
||||
${${VERILATE_PREFIX}_USER_LDLIBS}
|
||||
"$<$<BOOL:$<TARGET_PROPERTY:VERILATOR_THREADED>>:${VERILATOR_MT_CFLAGS}>"
|
||||
)
|
||||
|
||||
if (${VERILATE_PREFIX}_THREADS OR ${VERILATE_PREFIX}_TRACE_THREADS)
|
||||
target_link_libraries(${TARGET} PUBLIC
|
||||
${VERILATOR_MT_CFLAGS}
|
||||
)
|
||||
endif()
|
||||
|
||||
target_compile_features(${TARGET} PRIVATE cxx_std_11)
|
||||
endfunction()
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user