forked from github/verilator
Fix trace signal names getting hashed (#2643).
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4
Changes
4
Changes
@ -5,10 +5,12 @@ The contributors that suggested a given feature are shown in []. Thanks!
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* Verilator 4.105 devel
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**** Fix trace signal names getting hashed (#2643). [Barbara Gigerl]
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* Verilator 4.104 2020-11-14
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*** Support queue and associative array 'with' statements. (#2616)
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*** Support queue and associative array 'with' statements (#2616).
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*** Support queue slicing (#2326).
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@ -127,8 +127,9 @@ string AstNode::encodeName(const string& namein) {
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}
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// Shorten names
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// TODO long term use VName in place of "string name"
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VName vname(out);
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out = vname.hashedName();
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// Then we also won't need to save the table of hased values
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VName vname{out};
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return vname.hashedName();
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return out;
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}
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@ -161,7 +162,8 @@ string AstNode::dedotName(const string& namein) {
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string AstNode::vcdName(const string& namein) {
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// VCD tracing expects space to separate hierarchy
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// Dots are reserved for dots the user put in the name
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string pretty = namein;
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// We earlier hashed all symbols, dehash them so user sees real name
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string pretty{VName::dehash(namein)};
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string::size_type pos;
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while ((pos = pretty.find("__DOT__")) != string::npos) pretty.replace(pos, 7, " ");
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while ((pos = pretty.find('.')) != string::npos) pretty.replace(pos, 1, " ");
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@ -25,6 +25,7 @@
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size_t VName::s_minLength = 32;
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size_t VName::s_maxLength = 0; // Disabled
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std::map<string, string> VName::s_dehashMap;
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//######################################################################
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// Wildcard
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@ -377,6 +378,15 @@ void VHashSha256::selfTest() {
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//######################################################################
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// VName
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string VName::dehash(const string& in) {
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const string::size_type pos = in.find("__Vhsh");
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if (VL_LIKELY(pos == string::npos)) return in;
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const string vhsh = in.substr(pos);
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const auto& it = s_dehashMap.find(vhsh);
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UASSERT(it != s_dehashMap.end(), "String not in reverse hash map '" << vhsh << "'");
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return in.substr(0, pos) + it->second;
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}
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string VName::hashedName() {
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if (m_name == "") return "";
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if (m_hashed != "") return m_hashed; // Memoized
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@ -387,8 +397,10 @@ string VName::hashedName() {
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VHashSha256 hash(m_name);
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string suffix = "__Vhsh" + hash.digestSymbol();
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if (s_minLength < s_maxLength) {
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s_dehashMap[suffix] = m_name.substr(s_minLength);
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m_hashed = m_name.substr(0, s_minLength) + suffix;
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} else {
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s_dehashMap[suffix] = m_name;
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m_hashed = suffix;
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}
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return m_hashed;
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@ -22,6 +22,7 @@
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// No V3 headers here - this is a base class for Vlc etc
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#include <map>
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#include <string>
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#include <sstream>
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#include <vector>
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@ -159,9 +160,11 @@ private:
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class VName {
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string m_name;
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string m_hashed;
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static std::map<string, string> s_dehashMap; // hashed -> original decoder
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static size_t s_maxLength; // Length at which to start hashing
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static size_t s_minLength; // Length to preserve if over maxLength
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public:
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// CONSTRUCTORS
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explicit VName(const string& name)
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@ -178,6 +181,7 @@ public:
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// Length at which to start hashing, 0=disable
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static void maxLength(size_t flag) { s_maxLength = flag; }
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static size_t maxLength() { return s_maxLength; }
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static string dehash(const string& in);
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};
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//######################################################################
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@ -1,53 +1,54 @@
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$version Generated by VerilatedVcd $end
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$date Tue Jan 21 18:15:27 2020
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$date Mon Nov 16 17:48:27 2020
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$end
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$timescale 1ps $end
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$scope module top $end
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$var wire 1 7" clk $end
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$var wire 1 = clk $end
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$scope module $unit $end
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$var wire 1 # global_bit $end
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$upscope $end
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$scope module t $end
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$var wire 1 7" clk $end
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$var wire 32 + cyc [31:0] $end
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$var wire 8 p" unpacked_array(-1) [7:0] $end
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$var wire 8 o" unpacked_array(-2) [7:0] $end
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$var wire 8 q" unpacked_array(0) [7:0] $end
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$var real 64 E! v_arr_real(0) $end
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$var real 64 G! v_arr_real(1) $end
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$var wire 2 [ v_arrp [2:1] $end
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$var wire 4 c v_arrp_arrp [3:0] $end
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$var wire 4 k v_arrp_strp [3:0] $end
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$var wire 1 ?" v_arru(1) $end
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$var wire 1 @" v_arru(2) $end
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$var wire 2 s v_arru_arrp(3) [2:1] $end
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$var wire 2 t v_arru_arrp(4) [2:1] $end
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$var wire 1 O" v_arru_arru(3)(1) $end
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$var wire 1 W" v_arru_arru(3)(2) $end
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$var wire 1 _" v_arru_arru(4)(1) $end
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$var wire 1 g" v_arru_arru(4)(2) $end
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$var wire 2 %! v_arru_strp(3) [1:0] $end
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$var wire 2 -! v_arru_strp(4) [1:0] $end
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$var wire 3 u! v_enumb [2:0] $end
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$var wire 6 }! v_enumb2_str [5:0] $end
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$var wire 32 e! v_enumed [31:0] $end
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$var wire 32 m! v_enumed2 [31:0] $end
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$var real 64 5! v_real $end
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$var wire 64 3 v_str32x2 [63:0] $end
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$var wire 2 C v_strp [1:0] $end
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$var wire 4 K v_strp_strp [3:0] $end
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$var wire 2 S v_unip_strp [1:0] $end
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$var wire 1 G LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
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$var wire 1 = clk $end
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$var wire 32 $ cyc [31:0] $end
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$var wire 8 E unpacked_array(-1) [7:0] $end
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$var wire 8 D unpacked_array(-2) [7:0] $end
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$var wire 8 F unpacked_array(0) [7:0] $end
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$var real 64 1 v_arr_real(0) $end
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$var real 64 3 v_arr_real(1) $end
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$var wire 2 ( v_arrp [2:1] $end
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$var wire 4 ) v_arrp_arrp [3:0] $end
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$var wire 4 * v_arrp_strp [3:0] $end
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$var wire 1 > v_arru(1) $end
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$var wire 1 ? v_arru(2) $end
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$var wire 2 + v_arru_arrp(3) [2:1] $end
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$var wire 2 , v_arru_arrp(4) [2:1] $end
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$var wire 1 @ v_arru_arru(3)(1) $end
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$var wire 1 A v_arru_arru(3)(2) $end
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$var wire 1 B v_arru_arru(4)(1) $end
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$var wire 1 C v_arru_arru(4)(2) $end
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$var wire 2 - v_arru_strp(3) [1:0] $end
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$var wire 2 . v_arru_strp(4) [1:0] $end
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$var wire 3 9 v_enumb [2:0] $end
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$var wire 6 : v_enumb2_str [5:0] $end
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$var wire 32 7 v_enumed [31:0] $end
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$var wire 32 8 v_enumed2 [31:0] $end
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$var real 64 / v_real $end
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$var wire 64 5 v_str32x2 [63:0] $end
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$var wire 2 % v_strp [1:0] $end
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$var wire 4 & v_strp_strp [3:0] $end
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$var wire 2 ' v_unip_strp [1:0] $end
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$scope module p2 $end
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$var wire 32 )# PARAM [31:0] $end
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$var wire 32 H PARAM [31:0] $end
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$upscope $end
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$scope module p3 $end
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$var wire 32 1# PARAM [31:0] $end
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$var wire 32 I PARAM [31:0] $end
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$upscope $end
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$scope module unnamedblk1 $end
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$var wire 32 '" b [31:0] $end
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$var wire 32 ; b [31:0] $end
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$scope module unnamedblk2 $end
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$var wire 32 /" a [31:0] $end
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$var wire 32 < a [31:0] $end
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$upscope $end
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$upscope $end
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$upscope $end
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@ -57,173 +58,174 @@ $enddefinitions $end
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|
||||
b0000 &
|
||||
b00 '
|
||||
b00 (
|
||||
b0000 )
|
||||
b0000 *
|
||||
b00 +
|
||||
b00 ,
|
||||
b00 -
|
||||
b00 .
|
||||
r0.6 /
|
||||
r1.2 1
|
||||
r1.8 3
|
||||
b0000000000000000000000000000011000000000000000000000000011111001 5
|
||||
b00000000000000000000000000000110 7
|
||||
b00000000000000000000000000001100 8
|
||||
b010 9
|
||||
b011011 :
|
||||
1=
|
||||
|
@ -8,21 +8,21 @@ bit global_bit;
|
||||
|
||||
module t (clk);
|
||||
input clk;
|
||||
integer cyc=0;
|
||||
integer cyc=0;
|
||||
|
||||
typedef struct packed {
|
||||
bit b1;
|
||||
bit b0;
|
||||
bit b1;
|
||||
bit b0;
|
||||
} strp_t;
|
||||
|
||||
typedef struct packed {
|
||||
strp_t x1;
|
||||
strp_t x0;
|
||||
strp_t x1;
|
||||
strp_t x0;
|
||||
} strp_strp_t;
|
||||
|
||||
typedef union packed {
|
||||
strp_t x1;
|
||||
strp_t x0;
|
||||
strp_t x1;
|
||||
strp_t x0;
|
||||
} unip_strp_t;
|
||||
|
||||
typedef bit [2:1] arrp_t;
|
||||
@ -35,20 +35,20 @@ module t (clk);
|
||||
typedef arrp_t arru_arrp_t [4:3];
|
||||
typedef strp_t arru_strp_t [4:3];
|
||||
|
||||
strp_t v_strp;
|
||||
strp_strp_t v_strp_strp;
|
||||
unip_strp_t v_unip_strp;
|
||||
arrp_t v_arrp;
|
||||
arrp_arrp_t v_arrp_arrp;
|
||||
arrp_strp_t v_arrp_strp;
|
||||
arru_t v_arru;
|
||||
arru_arru_t v_arru_arru;
|
||||
arru_arrp_t v_arru_arrp;
|
||||
arru_strp_t v_arru_strp;
|
||||
strp_t v_strp;
|
||||
strp_strp_t v_strp_strp;
|
||||
unip_strp_t v_unip_strp;
|
||||
arrp_t v_arrp;
|
||||
arrp_arrp_t v_arrp_arrp;
|
||||
arrp_strp_t v_arrp_strp;
|
||||
arru_t v_arru;
|
||||
arru_arru_t v_arru_arru;
|
||||
arru_arrp_t v_arru_arrp;
|
||||
arru_strp_t v_arru_strp;
|
||||
|
||||
real v_real;
|
||||
real v_arr_real [2];
|
||||
string v_string;
|
||||
string v_string;
|
||||
|
||||
string v_assoc[string];
|
||||
initial v_assoc["key"] = "value";
|
||||
@ -73,6 +73,8 @@ module t (clk);
|
||||
|
||||
logic [7:0] unpacked_array[-2:0];
|
||||
|
||||
bit LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND;
|
||||
|
||||
p #(.PARAM(2)) p2 ();
|
||||
p #(.PARAM(3)) p3 ();
|
||||
|
||||
@ -93,18 +95,18 @@ module t (clk);
|
||||
v_enumb <= v_enumb - 1;
|
||||
v_enumb2_str <= {v_enumb, v_enumb};
|
||||
for (integer b=3; b<=4; b++) begin
|
||||
v_arru[b] <= ~v_arru[b];
|
||||
v_arru_strp[b] <= ~v_arru_strp[b];
|
||||
v_arru_arrp[b] <= ~v_arru_arrp[b];
|
||||
for (integer a=3; a<=4; a++) begin
|
||||
v_arru_arru[a][b] = ~v_arru_arru[a][b];
|
||||
end
|
||||
v_arru[b] <= ~v_arru[b];
|
||||
v_arru_strp[b] <= ~v_arru_strp[b];
|
||||
v_arru_arrp[b] <= ~v_arru_arrp[b];
|
||||
for (integer a=3; a<=4; a++) begin
|
||||
v_arru_arru[a][b] = ~v_arru_arru[a][b];
|
||||
end
|
||||
end
|
||||
v_str32x2[0] <= v_str32x2[0] - 1;
|
||||
v_str32x2[1] <= v_str32x2[1] + 1;
|
||||
if (cyc == 5) begin
|
||||
$write("*-* All Finished *-*\n");
|
||||
$finish;
|
||||
$write("*-* All Finished *-*\n");
|
||||
$finish;
|
||||
end
|
||||
end
|
||||
endmodule
|
||||
|
@ -1,5 +1,5 @@
|
||||
$date
|
||||
Sun Apr 19 04:15:26 2020
|
||||
Mon Nov 16 17:51:08 2020
|
||||
|
||||
$end
|
||||
$version
|
||||
@ -45,193 +45,197 @@ $var logic 6 : v_enumb2_str $end
|
||||
$var logic 8 ; unpacked_array(-2) $end
|
||||
$var logic 8 < unpacked_array(-1) $end
|
||||
$var logic 8 = unpacked_array(0) $end
|
||||
$var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
|
||||
$scope module unnamedblk1 $end
|
||||
$var integer 32 > b $end
|
||||
$var integer 32 ? b $end
|
||||
$scope module unnamedblk2 $end
|
||||
$var integer 32 ? a $end
|
||||
$var integer 32 @ a $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope module p2 $end
|
||||
$var parameter 32 @ PARAM $end
|
||||
$var parameter 32 A PARAM $end
|
||||
$upscope $end
|
||||
$scope module p3 $end
|
||||
$var parameter 32 A PARAM $end
|
||||
$var parameter 32 B PARAM $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope module $unit $end
|
||||
$var bit 1 B global_bit $end
|
||||
$var bit 1 C global_bit $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
#0
|
||||
$dumpvars
|
||||
0!
|
||||
b00000000000000000000000000000000 "
|
||||
b00 #
|
||||
b0000 $
|
||||
b00 %
|
||||
b00 &
|
||||
b0000 '
|
||||
b0000 (
|
||||
0)
|
||||
0*
|
||||
0+
|
||||
0,
|
||||
0-
|
||||
0.
|
||||
b00 /
|
||||
b00 0
|
||||
b00 1
|
||||
b00 2
|
||||
r0 3
|
||||
r0 4
|
||||
r0 5
|
||||
b0000000000000000000000000000000000000000000000000000000011111111 6
|
||||
b00000000000000000000000000000000 7
|
||||
b00000000000000000000000000000000 8
|
||||
b000 9
|
||||
b000000 :
|
||||
b00000000 ;
|
||||
b00000000 <
|
||||
b00000000 =
|
||||
b00000000000000000000000000000000 >
|
||||
1C
|
||||
b00000000000000000000000000000011 B
|
||||
b00000000000000000000000000000010 A
|
||||
b00000000000000000000000000000000 @
|
||||
b00000000000000000000000000000000 ?
|
||||
b00000000000000000000000000000010 @
|
||||
b00000000000000000000000000000011 A
|
||||
1B
|
||||
0>
|
||||
b00000000 =
|
||||
b00000000 <
|
||||
b00000000 ;
|
||||
b000000 :
|
||||
b000 9
|
||||
b00000000000000000000000000000000 8
|
||||
b00000000000000000000000000000000 7
|
||||
b0000000000000000000000000000000000000000000000000000000011111111 6
|
||||
r0 5
|
||||
r0 4
|
||||
r0 3
|
||||
b00 2
|
||||
b00 1
|
||||
b00 0
|
||||
b00 /
|
||||
0.
|
||||
0-
|
||||
0,
|
||||
0+
|
||||
0*
|
||||
0)
|
||||
b0000 (
|
||||
b0000 '
|
||||
b00 &
|
||||
b00 %
|
||||
b0000 $
|
||||
b00 #
|
||||
b00000000000000000000000000000000 "
|
||||
0!
|
||||
$end
|
||||
#10
|
||||
b00000000000000000000000000000101 ?
|
||||
b00000000000000000000000000000101 >
|
||||
b111 9
|
||||
b00000000000000000000000000000010 8
|
||||
b00000000000000000000000000000001 7
|
||||
b0000000000000000000000000000000100000000000000000000000011111110 6
|
||||
r0.3 5
|
||||
r0.2 4
|
||||
r0.1 3
|
||||
b11 2
|
||||
b11 1
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 (
|
||||
b1111 '
|
||||
b11 &
|
||||
b11 %
|
||||
b1111 $
|
||||
b11 #
|
||||
b00000000000000000000000000000001 "
|
||||
1!
|
||||
b00000000000000000000000000000001 "
|
||||
b11 #
|
||||
b1111 $
|
||||
b11 %
|
||||
b11 &
|
||||
b1111 '
|
||||
b1111 (
|
||||
b11 /
|
||||
b11 0
|
||||
b11 1
|
||||
b11 2
|
||||
r0.1 3
|
||||
r0.2 4
|
||||
r0.3 5
|
||||
b0000000000000000000000000000000100000000000000000000000011111110 6
|
||||
b00000000000000000000000000000001 7
|
||||
b00000000000000000000000000000010 8
|
||||
b111 9
|
||||
b00000000000000000000000000000101 ?
|
||||
b00000000000000000000000000000101 @
|
||||
#15
|
||||
0!
|
||||
#20
|
||||
1!
|
||||
b00000000000000000000000000000010 "
|
||||
b00 #
|
||||
b0000 $
|
||||
b00 %
|
||||
b00 &
|
||||
b0000 '
|
||||
b0000 (
|
||||
b00 /
|
||||
b00 0
|
||||
b00 1
|
||||
b00 2
|
||||
r0.2 3
|
||||
r0.4 4
|
||||
r0.6 5
|
||||
b0000000000000000000000000000001000000000000000000000000011111101 6
|
||||
b00000000000000000000000000000010 7
|
||||
b00000000000000000000000000000100 8
|
||||
b110 9
|
||||
b00000000000000000000000000000100 8
|
||||
b00000000000000000000000000000010 7
|
||||
b0000000000000000000000000000001000000000000000000000000011111101 6
|
||||
r0.6 5
|
||||
r0.4 4
|
||||
r0.2 3
|
||||
b00 2
|
||||
b00 1
|
||||
b00 0
|
||||
b00 /
|
||||
b0000 (
|
||||
b0000 '
|
||||
b00 &
|
||||
b00 %
|
||||
b0000 $
|
||||
b00 #
|
||||
b00000000000000000000000000000010 "
|
||||
b111111 :
|
||||
#25
|
||||
0!
|
||||
#30
|
||||
1!
|
||||
b110110 :
|
||||
b101 9
|
||||
b00000000000000000000000000000110 8
|
||||
b00000000000000000000000000000011 7
|
||||
b0000000000000000000000000000001100000000000000000000000011111100 6
|
||||
r0.8999999999999999 5
|
||||
r0.6000000000000001 4
|
||||
r0.3 3
|
||||
b11 2
|
||||
b11 1
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 (
|
||||
b1111 '
|
||||
b11 &
|
||||
b11 %
|
||||
b1111 $
|
||||
b11 #
|
||||
b00000000000000000000000000000011 "
|
||||
b11 #
|
||||
b1111 $
|
||||
b11 %
|
||||
b11 &
|
||||
b1111 '
|
||||
b1111 (
|
||||
b11 /
|
||||
b11 0
|
||||
b11 1
|
||||
b11 2
|
||||
r0.3 3
|
||||
r0.6000000000000001 4
|
||||
r0.8999999999999999 5
|
||||
b0000000000000000000000000000001100000000000000000000000011111100 6
|
||||
b00000000000000000000000000000011 7
|
||||
b00000000000000000000000000000110 8
|
||||
b101 9
|
||||
#35
|
||||
0!
|
||||
#40
|
||||
1!
|
||||
b00000000000000000000000000000100 "
|
||||
b00 #
|
||||
b0000 $
|
||||
b00 %
|
||||
b00 &
|
||||
b0000 '
|
||||
b0000 (
|
||||
b00 /
|
||||
b00 0
|
||||
b00 1
|
||||
b00 2
|
||||
r0.4 3
|
||||
r0.8 4
|
||||
r1.2 5
|
||||
b0000000000000000000000000000010000000000000000000000000011111011 6
|
||||
b00000000000000000000000000000100 7
|
||||
b00000000000000000000000000001000 8
|
||||
b100 9
|
||||
b00000000000000000000000000001000 8
|
||||
b00000000000000000000000000000100 7
|
||||
b0000000000000000000000000000010000000000000000000000000011111011 6
|
||||
r1.2 5
|
||||
r0.8 4
|
||||
r0.4 3
|
||||
b00 2
|
||||
b00 1
|
||||
b00 0
|
||||
b00 /
|
||||
b0000 (
|
||||
b0000 '
|
||||
b00 &
|
||||
b00 %
|
||||
b0000 $
|
||||
b00 #
|
||||
b00000000000000000000000000000100 "
|
||||
b101101 :
|
||||
#45
|
||||
0!
|
||||
#50
|
||||
1!
|
||||
b100100 :
|
||||
b011 9
|
||||
b00000000000000000000000000001010 8
|
||||
b00000000000000000000000000000101 7
|
||||
b0000000000000000000000000000010100000000000000000000000011111010 6
|
||||
r1.5 5
|
||||
r1 4
|
||||
r0.5 3
|
||||
b11 2
|
||||
b11 1
|
||||
b11 0
|
||||
b11 /
|
||||
b1111 (
|
||||
b1111 '
|
||||
b11 &
|
||||
b11 %
|
||||
b1111 $
|
||||
b11 #
|
||||
b00000000000000000000000000000101 "
|
||||
b11 #
|
||||
b1111 $
|
||||
b11 %
|
||||
b11 &
|
||||
b1111 '
|
||||
b1111 (
|
||||
b11 /
|
||||
b11 0
|
||||
b11 1
|
||||
b11 2
|
||||
r0.5 3
|
||||
r1 4
|
||||
r1.5 5
|
||||
b0000000000000000000000000000010100000000000000000000000011111010 6
|
||||
b00000000000000000000000000000101 7
|
||||
b00000000000000000000000000001010 8
|
||||
b011 9
|
||||
#55
|
||||
0!
|
||||
#60
|
||||
1!
|
||||
b00000000000000000000000000000110 "
|
||||
b00 #
|
||||
b0000 $
|
||||
b00 %
|
||||
b00 &
|
||||
b0000 '
|
||||
b0000 (
|
||||
b00 /
|
||||
b00 0
|
||||
b00 1
|
||||
b00 2
|
||||
r0.6 3
|
||||
r1.2 4
|
||||
r1.8 5
|
||||
b0000000000000000000000000000011000000000000000000000000011111001 6
|
||||
b00000000000000000000000000000110 7
|
||||
b00000000000000000000000000001100 8
|
||||
b010 9
|
||||
b00000000000000000000000000001100 8
|
||||
b00000000000000000000000000000110 7
|
||||
b0000000000000000000000000000011000000000000000000000000011111001 6
|
||||
r1.8 5
|
||||
r1.2 4
|
||||
r0.6 3
|
||||
b00 2
|
||||
b00 1
|
||||
b00 0
|
||||
b00 /
|
||||
b0000 (
|
||||
b0000 '
|
||||
b00 &
|
||||
b00 %
|
||||
b0000 $
|
||||
b00 #
|
||||
b00000000000000000000000000000110 "
|
||||
b011011 :
|
||||
|
@ -1,53 +1,54 @@
|
||||
$version Generated by VerilatedVcd $end
|
||||
$date Tue Jan 21 18:15:28 2020
|
||||
$date Mon Nov 16 17:51:08 2020
|
||||
$end
|
||||
$timescale 1ps $end
|
||||
|
||||
$scope module top $end
|
||||
$var wire 1 7" clk $end
|
||||
$var wire 1 = clk $end
|
||||
$scope module $unit $end
|
||||
$var wire 1 # global_bit $end
|
||||
$upscope $end
|
||||
$scope module t $end
|
||||
$var wire 1 7" clk $end
|
||||
$var wire 32 + cyc [31:0] $end
|
||||
$var wire 8 p" unpacked_array(-1) [7:0] $end
|
||||
$var wire 8 o" unpacked_array(-2) [7:0] $end
|
||||
$var wire 8 q" unpacked_array(0) [7:0] $end
|
||||
$var real 64 E! v_arr_real(0) $end
|
||||
$var real 64 G! v_arr_real(1) $end
|
||||
$var wire 2 [ v_arrp [2:1] $end
|
||||
$var wire 4 c v_arrp_arrp [3:0] $end
|
||||
$var wire 4 k v_arrp_strp [3:0] $end
|
||||
$var wire 1 ?" v_arru(1) $end
|
||||
$var wire 1 @" v_arru(2) $end
|
||||
$var wire 2 s v_arru_arrp(3) [2:1] $end
|
||||
$var wire 2 t v_arru_arrp(4) [2:1] $end
|
||||
$var wire 1 O" v_arru_arru(3)(1) $end
|
||||
$var wire 1 W" v_arru_arru(3)(2) $end
|
||||
$var wire 1 _" v_arru_arru(4)(1) $end
|
||||
$var wire 1 g" v_arru_arru(4)(2) $end
|
||||
$var wire 2 %! v_arru_strp(3) [1:0] $end
|
||||
$var wire 2 -! v_arru_strp(4) [1:0] $end
|
||||
$var wire 3 u! v_enumb [2:0] $end
|
||||
$var wire 6 }! v_enumb2_str [5:0] $end
|
||||
$var wire 32 e! v_enumed [31:0] $end
|
||||
$var wire 32 m! v_enumed2 [31:0] $end
|
||||
$var real 64 5! v_real $end
|
||||
$var wire 64 3 v_str32x2 [63:0] $end
|
||||
$var wire 2 C v_strp [1:0] $end
|
||||
$var wire 4 K v_strp_strp [3:0] $end
|
||||
$var wire 2 S v_unip_strp [1:0] $end
|
||||
$var wire 1 G LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
|
||||
$var wire 1 = clk $end
|
||||
$var wire 32 $ cyc [31:0] $end
|
||||
$var wire 8 E unpacked_array(-1) [7:0] $end
|
||||
$var wire 8 D unpacked_array(-2) [7:0] $end
|
||||
$var wire 8 F unpacked_array(0) [7:0] $end
|
||||
$var real 64 1 v_arr_real(0) $end
|
||||
$var real 64 3 v_arr_real(1) $end
|
||||
$var wire 2 ( v_arrp [2:1] $end
|
||||
$var wire 4 ) v_arrp_arrp [3:0] $end
|
||||
$var wire 4 * v_arrp_strp [3:0] $end
|
||||
$var wire 1 > v_arru(1) $end
|
||||
$var wire 1 ? v_arru(2) $end
|
||||
$var wire 2 + v_arru_arrp(3) [2:1] $end
|
||||
$var wire 2 , v_arru_arrp(4) [2:1] $end
|
||||
$var wire 1 @ v_arru_arru(3)(1) $end
|
||||
$var wire 1 A v_arru_arru(3)(2) $end
|
||||
$var wire 1 B v_arru_arru(4)(1) $end
|
||||
$var wire 1 C v_arru_arru(4)(2) $end
|
||||
$var wire 2 - v_arru_strp(3) [1:0] $end
|
||||
$var wire 2 . v_arru_strp(4) [1:0] $end
|
||||
$var wire 3 9 v_enumb [2:0] $end
|
||||
$var wire 6 : v_enumb2_str [5:0] $end
|
||||
$var wire 32 7 v_enumed [31:0] $end
|
||||
$var wire 32 8 v_enumed2 [31:0] $end
|
||||
$var real 64 / v_real $end
|
||||
$var wire 64 5 v_str32x2 [63:0] $end
|
||||
$var wire 2 % v_strp [1:0] $end
|
||||
$var wire 4 & v_strp_strp [3:0] $end
|
||||
$var wire 2 ' v_unip_strp [1:0] $end
|
||||
$scope module p2 $end
|
||||
$var wire 32 )# PARAM [31:0] $end
|
||||
$var wire 32 H PARAM [31:0] $end
|
||||
$upscope $end
|
||||
$scope module p3 $end
|
||||
$var wire 32 1# PARAM [31:0] $end
|
||||
$var wire 32 I PARAM [31:0] $end
|
||||
$upscope $end
|
||||
$scope module unnamedblk1 $end
|
||||
$var wire 32 '" b [31:0] $end
|
||||
$var wire 32 ; b [31:0] $end
|
||||
$scope module unnamedblk2 $end
|
||||
$var wire 32 /" a [31:0] $end
|
||||
$var wire 32 < a [31:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
@ -57,173 +58,174 @@ $enddefinitions $end
|
||||
|
||||
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|
||||
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|
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1=
|
||||
|
@ -1,5 +1,5 @@
|
||||
$date
|
||||
Sun Apr 19 04:15:31 2020
|
||||
Mon Nov 16 17:51:08 2020
|
||||
|
||||
$end
|
||||
$version
|
||||
@ -45,193 +45,197 @@ $var logic 6 : v_enumb2_str $end
|
||||
$var logic 8 ; unpacked_array(-2) $end
|
||||
$var logic 8 < unpacked_array(-1) $end
|
||||
$var logic 8 = unpacked_array(0) $end
|
||||
$var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
|
||||
$scope module unnamedblk1 $end
|
||||
$var integer 32 > b $end
|
||||
$var integer 32 ? b $end
|
||||
$scope module unnamedblk2 $end
|
||||
$var integer 32 ? a $end
|
||||
$var integer 32 @ a $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope module p2 $end
|
||||
$var parameter 32 @ PARAM $end
|
||||
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|
||||
$upscope $end
|
||||
$scope module p3 $end
|
||||
$var parameter 32 A PARAM $end
|
||||
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|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope module $unit $end
|
||||
$var bit 1 B global_bit $end
|
||||
$var bit 1 C global_bit $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
b101 9
|
||||
#35
|
||||
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|
||||
#40
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
b00 0
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
b100100 :
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
b11 2
|
||||
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|
||||
b11 0
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
b11 0
|
||||
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|
||||
b11 2
|
||||
r0.5 3
|
||||
r1 4
|
||||
r1.5 5
|
||||
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|
||||
b00000000000000000000000000000101 7
|
||||
b00000000000000000000000000001010 8
|
||||
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|
||||
#55
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
b00 0
|
||||
b00 1
|
||||
b00 2
|
||||
r0.6 3
|
||||
r1.2 4
|
||||
r1.8 5
|
||||
b0000000000000000000000000000011000000000000000000000000011111001 6
|
||||
b00000000000000000000000000000110 7
|
||||
b00000000000000000000000000001100 8
|
||||
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|
||||
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|
||||
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|
||||
b0000000000000000000000000000011000000000000000000000000011111001 6
|
||||
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|
||||
r1.2 4
|
||||
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|
||||
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|
||||
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|
||||
b00 0
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
b011011 :
|
||||
|
@ -1,90 +1,91 @@
|
||||
$version Generated by VerilatedVcd $end
|
||||
$date Tue Jan 21 18:55:13 2020
|
||||
$date Mon Nov 16 17:51:09 2020
|
||||
$end
|
||||
$timescale 1ps $end
|
||||
|
||||
$scope module top $end
|
||||
$var wire 1 9# clk $end
|
||||
$var wire 1 I clk $end
|
||||
$scope module $unit $end
|
||||
$var wire 1 # global_bit $end
|
||||
$upscope $end
|
||||
$scope module t $end
|
||||
$var wire 1 9# clk $end
|
||||
$var wire 32 + cyc [31:0] $end
|
||||
$var wire 8 r# unpacked_array(-1) [7:0] $end
|
||||
$var wire 8 q# unpacked_array(-2) [7:0] $end
|
||||
$var wire 8 s# unpacked_array(0) [7:0] $end
|
||||
$var real 64 ?" v_arr_real(0) $end
|
||||
$var real 64 A" v_arr_real(1) $end
|
||||
$var wire 2 %! v_arrp [2:1] $end
|
||||
$var wire 2 -! v_arrp_arrp(3) [2:1] $end
|
||||
$var wire 2 5! v_arrp_arrp(4) [2:1] $end
|
||||
$var wire 1 A# v_arru(1) $end
|
||||
$var wire 1 B# v_arru(2) $end
|
||||
$var wire 2 ]! v_arru_arrp(3) [2:1] $end
|
||||
$var wire 2 ^! v_arru_arrp(4) [2:1] $end
|
||||
$var wire 1 Q# v_arru_arru(3)(1) $end
|
||||
$var wire 1 Y# v_arru_arru(3)(2) $end
|
||||
$var wire 1 a# v_arru_arru(4)(1) $end
|
||||
$var wire 1 i# v_arru_arru(4)(2) $end
|
||||
$var wire 3 o" v_enumb [2:0] $end
|
||||
$var wire 32 _" v_enumed [31:0] $end
|
||||
$var wire 32 g" v_enumed2 [31:0] $end
|
||||
$var real 64 /" v_real $end
|
||||
$var wire 1 S LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
|
||||
$var wire 1 I clk $end
|
||||
$var wire 32 $ cyc [31:0] $end
|
||||
$var wire 8 Q unpacked_array(-1) [7:0] $end
|
||||
$var wire 8 P unpacked_array(-2) [7:0] $end
|
||||
$var wire 8 R unpacked_array(0) [7:0] $end
|
||||
$var real 64 < v_arr_real(0) $end
|
||||
$var real 64 > v_arr_real(1) $end
|
||||
$var wire 2 - v_arrp [2:1] $end
|
||||
$var wire 2 . v_arrp_arrp(3) [2:1] $end
|
||||
$var wire 2 / v_arrp_arrp(4) [2:1] $end
|
||||
$var wire 1 J v_arru(1) $end
|
||||
$var wire 1 K v_arru(2) $end
|
||||
$var wire 2 4 v_arru_arrp(3) [2:1] $end
|
||||
$var wire 2 5 v_arru_arrp(4) [2:1] $end
|
||||
$var wire 1 L v_arru_arru(3)(1) $end
|
||||
$var wire 1 M v_arru_arru(3)(2) $end
|
||||
$var wire 1 N v_arru_arru(4)(1) $end
|
||||
$var wire 1 O v_arru_arru(4)(2) $end
|
||||
$var wire 3 D v_enumb [2:0] $end
|
||||
$var wire 32 B v_enumed [31:0] $end
|
||||
$var wire 32 C v_enumed2 [31:0] $end
|
||||
$var real 64 : v_real $end
|
||||
$scope module unnamedblk1 $end
|
||||
$var wire 32 )# b [31:0] $end
|
||||
$var wire 32 G b [31:0] $end
|
||||
$scope module unnamedblk2 $end
|
||||
$var wire 32 1# a [31:0] $end
|
||||
$var wire 32 H a [31:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope module v_arrp_strp(3) $end
|
||||
$var wire 1 E! b0 $end
|
||||
$var wire 1 =! b1 $end
|
||||
$var wire 1 1 b0 $end
|
||||
$var wire 1 0 b1 $end
|
||||
$upscope $end
|
||||
$scope module v_arrp_strp(4) $end
|
||||
$var wire 1 U! b0 $end
|
||||
$var wire 1 M! b1 $end
|
||||
$var wire 1 3 b0 $end
|
||||
$var wire 1 2 b1 $end
|
||||
$upscope $end
|
||||
$scope module v_arru_strp(3) $end
|
||||
$var wire 1 u! b0 $end
|
||||
$var wire 1 m! b1 $end
|
||||
$var wire 1 7 b0 $end
|
||||
$var wire 1 6 b1 $end
|
||||
$upscope $end
|
||||
$scope module v_arru_strp(4) $end
|
||||
$var wire 1 '" b0 $end
|
||||
$var wire 1 }! b1 $end
|
||||
$var wire 1 9 b0 $end
|
||||
$var wire 1 8 b1 $end
|
||||
$upscope $end
|
||||
$scope module v_enumb2_str $end
|
||||
$var wire 3 w" a [2:0] $end
|
||||
$var wire 3 !# b [2:0] $end
|
||||
$var wire 3 E a [2:0] $end
|
||||
$var wire 3 F b [2:0] $end
|
||||
$upscope $end
|
||||
$scope module v_str32x2(0) $end
|
||||
$var wire 32 3 data [31:0] $end
|
||||
$var wire 32 @ data [31:0] $end
|
||||
$upscope $end
|
||||
$scope module v_str32x2(1) $end
|
||||
$var wire 32 ; data [31:0] $end
|
||||
$var wire 32 A data [31:0] $end
|
||||
$upscope $end
|
||||
$scope module v_strp $end
|
||||
$var wire 1 K b0 $end
|
||||
$var wire 1 C b1 $end
|
||||
$var wire 1 & b0 $end
|
||||
$var wire 1 % b1 $end
|
||||
$upscope $end
|
||||
$scope module v_strp_strp $end
|
||||
$scope module x0 $end
|
||||
$var wire 1 k b0 $end
|
||||
$var wire 1 c b1 $end
|
||||
$var wire 1 * b0 $end
|
||||
$var wire 1 ) b1 $end
|
||||
$upscope $end
|
||||
$scope module x1 $end
|
||||
$var wire 1 [ b0 $end
|
||||
$var wire 1 S b1 $end
|
||||
$var wire 1 ( b0 $end
|
||||
$var wire 1 ' b1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope module v_unip_strp $end
|
||||
$scope module x0 $end
|
||||
$var wire 1 { b0 $end
|
||||
$var wire 1 s b1 $end
|
||||
$var wire 1 , b0 $end
|
||||
$var wire 1 + b1 $end
|
||||
$upscope $end
|
||||
$scope module x1 $end
|
||||
$var wire 1 { b0 $end
|
||||
$var wire 1 s b1 $end
|
||||
$var wire 1 , b0 $end
|
||||
$var wire 1 + b1 $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
@ -94,261 +95,262 @@ $enddefinitions $end
|
||||
|
||||
#0
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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||||
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|
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
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||||
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||||
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|
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
b00000000000000000000000011111100 @
|
||||
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|
||||
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|
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|
||||
Mon Nov 16 17:51:13 2020
|
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Loading…
Reference in New Issue
Block a user