forked from github/verilator
Test fix
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@ -79,7 +79,7 @@ module t();
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typedef byte MEM_BYTES [256];
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typedef bit signed [7:0] MY_MEM_BYTES [256]; // MY_MEM_BYTES matches
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// MEM_BYTES
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typedef byte [255:0] MEM_BYTES_PACKED;
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typedef bit signed [7:0] [255:0] MEM_BYTES_PACKED;
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typedef bit signed [7:0] [255:0] MY_MEM_BYTES_PACKED;
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typedef logic [1:0] [3:0] NIBBLES;
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typedef logic [7:0] MY_BYTE; // MY_BYTE and NIBBLES are not matching types
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