forked from github/verilator
Fix SystemC arrayed bit vectors, bug886.
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@ -7,6 +7,8 @@ indicates the contributor was also the author of the fix; Thanks!
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**** Fix comma-instantiations with parameters, bug884. [Franck Jullien]
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**** Fix SystemC arrayed bit vectors, bug886. [David Poole]
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* Verilator 3.870 2015-02-12
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@ -350,6 +350,27 @@ string AstVar::scType() const {
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}
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}
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AstVar* AstVar::scVarRecurse(AstNode* nodep) {
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// See if this is a SC assignment; if so return that type
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// Historically sc variables are identified by a variable
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// attribute. TODO it would better be a data type attribute.
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if (AstVar* anodep = nodep->castVar()) {
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if (anodep->isSc()) return anodep;
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else return NULL;
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}
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else if (nodep->castVarRef()) {
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if (nodep->castVarRef()->varp()->isSc()) return nodep->castVarRef()->varp();
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else return NULL;
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}
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else if (nodep->castArraySel()) {
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if (nodep->op1p()) if (AstVar* p = scVarRecurse(nodep->op1p())) return p;
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if (nodep->op2p()) if (AstVar* p = scVarRecurse(nodep->op2p())) return p;
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if (nodep->op3p()) if (AstVar* p = scVarRecurse(nodep->op3p())) return p;
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if (nodep->op4p()) if (AstVar* p = scVarRecurse(nodep->op4p())) return p;
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}
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return NULL;
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}
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AstNodeDType* AstNodeDType::dtypeDimensionp(int dimension) {
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// dimension passed from AstArraySel::dimension
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// Dimension 0 means the VAR itself, 1 is the closest SEL to the AstVar,
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@ -1132,6 +1132,7 @@ public:
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if (varType()==AstVarType::INOUT) m_varType = AstVarType::TRIWIRE;
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if (varType()==AstVarType::INPUT || varType()==AstVarType::OUTPUT) m_varType = AstVarType::WIRE;
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}
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static AstVar* scVarRecurse(AstNode* nodep);
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};
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class AstDefParam : public AstNode {
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@ -149,6 +149,7 @@ private:
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if (!nodep->lvalue()
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&& !nodep->backp()->castCCast()
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&& nodep->backp()->castNodeMath()
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&& !nodep->backp()->castArraySel()
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&& nodep->backp()->width()
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&& castSize(nodep) != castSize(nodep->varp())) {
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// Cast vars to IData first, else below has upper bits wrongly set
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@ -83,6 +83,7 @@ public:
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: nodep->isQuad() ? "Q" : "I");
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}
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void emitScIQW(AstVar* nodep) {
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if (!nodep->isSc()) nodep->v3fatalSrc("emitting SystemC operator on non-SC variable");
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puts (nodep->isScBigUint() ? "SB"
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: nodep->isScUint() ? "SU"
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: nodep->isScBv() ? "SW"
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@ -155,19 +156,17 @@ public:
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selp->lsbp()->iterateAndNext(*this); puts(", ");
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selp->fromp()->iterateAndNext(*this); puts(", ");
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}
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} else if (nodep->lhsp()->castVarRef()
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&& nodep->lhsp()->castVarRef()->varp()->isSc()) {
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} else if (AstVar* varp = AstVar::scVarRecurse(nodep->lhsp())) {
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putbs("VL_ASSIGN_"); // Set a systemC variable
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emitScIQW(nodep->lhsp()->castVarRef()->varp());
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emitScIQW(varp);
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emitIQW(nodep);
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puts("(");
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puts(cvtToStr(nodep->widthMin())+",");
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nodep->lhsp()->iterateAndNext(*this); puts(", ");
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} else if (nodep->rhsp()->castVarRef()
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&& nodep->rhsp()->castVarRef()->varp()->isSc()) {
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} else if (AstVar* varp = AstVar::scVarRecurse(nodep->rhsp())) {
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putbs("VL_ASSIGN_"); // Get a systemC variable
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emitIQW(nodep);
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emitScIQW(nodep->rhsp()->castVarRef()->varp());
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emitScIQW(varp);
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puts("(");
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puts(cvtToStr(nodep->widthMin())+",");
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nodep->lhsp()->iterateAndNext(*this); puts(", ");
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@ -874,16 +874,13 @@ private:
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nodep->iterateChildren(*this);
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bool did = false;
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if (nodep->isWide() && ((nodep->lhsp()->castVarRef()
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&& !nodep->lhsp()->castVarRef()->varp()->isSc())
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|| nodep->lhsp()->castArraySel())) {
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|| nodep->lhsp()->castArraySel()))
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&& !AstVar::scVarRecurse(nodep->lhsp()) // Need special function for SC
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&& !AstVar::scVarRecurse(nodep->rhsp())) {
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if (AstConst* rhsp = nodep->rhsp()->castConst()) {
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did = expandWide(nodep,rhsp);
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} else if (AstVarRef* rhsp = nodep->rhsp()->castVarRef()) {
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if (rhsp->varp()->isSc()) {
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// Still need special access function
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} else {
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did = expandWide(nodep,rhsp);
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}
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did = expandWide(nodep,rhsp);
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} else if (AstSel* rhsp = nodep->rhsp()->castSel()) {
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did = expandWide(nodep,rhsp);
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} else if (AstArraySel* rhsp = nodep->rhsp()->castArraySel()) {
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@ -124,7 +124,7 @@ private:
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bool assignNoTemp(AstNodeAssign* nodep) {
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return (nodep->lhsp()->castVarRef()
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&& !nodep->lhsp()->castVarRef()->varp()->isSc()
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&& !AstVar::scVarRecurse(nodep->lhsp())
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&& nodep->rhsp()->castConst());
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}
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void checkNode(AstNode* nodep) {
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@ -8,9 +8,9 @@
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module t (/*AUTOARG*/
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// Outputs
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o1, o8, o16, o32, o64, o65, o128, o513, obv1, obv16,
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o1, o8, o16, o32, o64, o65, o128, o513, o1a2, o94a3, obv1, obv16,
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// Inputs
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clk, i1, i8, i16, i32, i64, i65, i128, i513, ibv1, ibv16
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clk, i1, i8, i16, i32, i64, i65, i128, i513, i1a2, i94a3, ibv1, ibv16
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);
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input clk;
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@ -23,6 +23,9 @@ module t (/*AUTOARG*/
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input [64:0] i65;
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input [127:0] i128;
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input [512:0] i513;
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input i1a2 [1:0];
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input [93:0] i94a3 [2:0];
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output o1;
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output [7:0] o8;
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@ -32,6 +35,8 @@ module t (/*AUTOARG*/
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output [64:0] o65;
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output [127:0] o128;
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output [512:0] o513;
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output o1a2 [1:0];
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output [93:0] o94a3 [2:0];
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input [0:0] ibv1 /*verilator sc_bv*/;
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input [15:0] ibv16 /*verilator sc_bv*/;
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@ -50,6 +55,8 @@ module t (/*AUTOARG*/
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o513 <= i513;
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obv1 <= ibv1;
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obv16 <= ibv16;
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o1a2 <= i1a2;
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o94a3 <= i94a3;
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end
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endmodule
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