From 62387a0e326460e3dd1fcd7bda4f7b85506b78b4 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 25 Nov 2021 08:03:27 -0500 Subject: [PATCH] Fix display of empty string constant (#3207) (#3215). --- Changes | 2 +- src/V3Width.cpp | 10 +++++++++- test_regress/t/t_string_size.v | 19 +++++++++++++++++++ 3 files changed, 29 insertions(+), 2 deletions(-) diff --git a/Changes b/Changes index 10f50d405..ba85d7c42 100644 --- a/Changes +++ b/Changes @@ -24,7 +24,7 @@ Verilator 4.215 devel * Fix nested generate if genblk naming (#3189). [yanx21] * Fix hang on recursive definition error (#3199). [Jonathan Kimmitt] * Fix display of signed without format (#3204). [Julie Schwartz] -* Fix display of empty string constant (#3207). [Julie Schwartz] +* Fix display of empty string constant (#3207) (#3215). [Julie Schwartz] * Fix incorrect width after and-or optimization (#3208). [Julie Schwartz] * Fix $fopen etc on integer arrays (#3214). [adrienlemasle] * Fix $size on dynamic strings (#3216). diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 15df19767..284eeab1e 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1939,7 +1939,15 @@ private: } else { issigned = bdtypep->isSigned(); } - if (nodep->valuep()->dtypep()->widthSized()) { + if (valueBdtypep->isString()) { + // parameter X = "str", per IEEE is a number, not a string + if (const auto* const constp = VN_CAST(nodep->valuep(), Const)) { + if (constp->num().isString()) { + width = constp->num().toString().length() * 8; + } + } + if (width < 8) width = 8; + } else if (nodep->valuep()->dtypep()->widthSized()) { width = nodep->valuep()->width(); } else { if (nodep->valuep()->width() > 32) { diff --git a/test_regress/t/t_string_size.v b/test_regress/t/t_string_size.v index f9d87caa3..b18b92137 100644 --- a/test_regress/t/t_string_size.v +++ b/test_regress/t/t_string_size.v @@ -10,6 +10,11 @@ module t; parameter string OS = "O"; parameter OI = "O"; // B is an integer of width 8 + parameter bit [31:0] NEST = "NEST"; + parameter bit [31:0] TEST = "TEST"; + bit [31:0] rest; + string s; + initial begin $display(">< == >%s<", ""); $display(">< == >%s<", ES); @@ -18,9 +23,23 @@ module t; if ($bits("") != 0) $stop; if ($bits("A") != 8) $stop; if ($bits(ES) != 0) $stop; + if ($bits(EI) != 8) $stop; if ($bits(OS) != 8) $stop; if ($bits(OI) != 8) $stop; + if (ES == "TEST") $stop; // Illegal in some simulators as not both strings + if (EI == "TEST") $stop; + if (OS == "TEST") $stop; // Illegal in some simulators as not both strings + // verilator lint_off WIDTH + if (OI == "TEST") $stop; + if (rest == "TEST") $stop; + + if (ES == TEST) $stop; + if (EI == TEST) $stop; + if (OS == TEST) $stop; + if (OI == TEST) $stop; + if (rest == TEST) $stop; + $write("*-* All Finished *-*\n"); $finish; end