diff --git a/test_regress/t/t_dpi_type_bad.out b/test_regress/t/t_dpi_type_bad.out
new file mode 100644
index 000000000..7fe755402
--- /dev/null
+++ b/test_regress/t/t_dpi_type_bad.out
@@ -0,0 +1,4 @@
+%Error: t/t_dpi_type_bad.v:11:4: Unsupported DPI type 'DPI-BAD': Use 'DPI-C'
+   11 |    import "DPI-BAD" task dpix_twice;
+      |    ^~~~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_dpi_type_bad.pl b/test_regress/t/t_dpi_type_bad.pl
new file mode 100755
index 000000000..59ba0d6c6
--- /dev/null
+++ b/test_regress/t/t_dpi_type_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => $Self->{vlt_all},
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_dpi_type_bad.v b/test_regress/t/t_dpi_type_bad.v
new file mode 100644
index 000000000..a5113f66e
--- /dev/null
+++ b/test_regress/t/t_dpi_type_bad.v
@@ -0,0 +1,15 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// Copyright 2021 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+module t;
+
+   import "DPI-BAD" task dpix_twice;
+   initial begin
+      $stop;
+   end
+endmodule
diff --git a/test_regress/t/t_enum.v b/test_regress/t/t_enum.v
index 1a5c87b9b..569c2e4b3 100644
--- a/test_regress/t/t_enum.v
+++ b/test_regress/t/t_enum.v
@@ -31,6 +31,7 @@ module t (/*AUTOARG*/);
 	 z5 = e5
 	 } ZN;
 
+   typedef enum three_t;  // Forward
    typedef enum [2:0] { ONES=~0 } three_t;
    three_t three = ONES;
 
diff --git a/test_regress/t/t_math_const.v b/test_regress/t/t_math_const.v
index 654a7161d..11bd286eb 100644
--- a/test_regress/t/t_math_const.v
+++ b/test_regress/t/t_math_const.v
@@ -106,7 +106,9 @@ module t (/*AUTOARG*/
 	    w32 = 12; w32 |= 15; if (w32 != 15) $stop;
 	    w32 = 12; w32 ^= 15; if (w32 != 3) $stop;
 	    w32 = 12; w32 >>= 1; if (w32 != 6) $stop;
+	    w32 = 12; w32 >>>= 1; if (w32 != 6) $stop;
 	    w32 = 12; w32 <<= 1; if (w32 != 24) $stop;
+	    w32 = 12; w32 %= 5; if (w32 != 2) $stop;
 
 	    // Increments
 	    v32[1] = 12; v32[1]++;  if (v32[1] != 13) $stop;
diff --git a/test_regress/t/t_struct_array.v b/test_regress/t/t_struct_array.v
index 9ea97e318..80320e831 100644
--- a/test_regress/t/t_struct_array.v
+++ b/test_regress/t/t_struct_array.v
@@ -5,6 +5,7 @@
 // SPDX-License-Identifier: CC0-1.0
 
 package TEST_TYPES;
+   typedef struct a_struct_t;  // Forward
    typedef struct packed {
       logic 	  stuff;
    } a_struct_t;
diff --git a/test_regress/t/t_struct_init.v b/test_regress/t/t_struct_init.v
index 81f0b2263..4f154d190 100644
--- a/test_regress/t/t_struct_init.v
+++ b/test_regress/t/t_struct_init.v
@@ -21,6 +21,7 @@ module t;
       b4_t      x0;
    } b4x2_t;
 
+   typedef union  q4_t;  // Forward
    typedef union packed { // [3:0]
       bit [3:0] quad0;
       b4_t      quad1;
diff --git a/test_regress/t/t_struct_init_bad.out b/test_regress/t/t_struct_init_bad.out
index 739b169af..2213562e0 100644
--- a/test_regress/t/t_struct_init_bad.out
+++ b/test_regress/t/t_struct_init_bad.out
@@ -1,5 +1,5 @@
-%Error: t/t_struct_init.v:54:40: Assignment pattern contains duplicate entry: b1
+%Error: t/t_struct_init.v:55:40: Assignment pattern contains duplicate entry: b1
                                : ... In instance t
-   54 |    const b4_t b4_const_c = '{b1: 1'b1, b1: 1'b0, b0:1'b0, b2: 1'b1, b3: 1'b1};
+   55 |    const b4_t b4_const_c = '{b1: 1'b1, b1: 1'b0, b0:1'b0, b2: 1'b1, b3: 1'b1};
       |                                        ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_unroll_genf.v b/test_regress/t/t_unroll_genf.v
index 70d4852c7..3d89bdeb9 100644
--- a/test_regress/t/t_unroll_genf.v
+++ b/test_regress/t/t_unroll_genf.v
@@ -19,7 +19,7 @@ module t (/*AUTOARG*/);
    genvar j;
    generate
       for (j = 0; j < cdiv(10); j=j+1)
-        sub sub();
+        sub #() sub ();  // #() for code coverage in verilog.y
    endgenerate
 
    initial begin