forked from github/verilator
Commentary
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Wilson Snyder
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Changes
18
Changes
@ -557,7 +557,7 @@ Verilator 4.014 2019-05-08
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* For FST tracing use LZ4 compression. [Tony Bybell]
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* Add error when use parameters without value. (#1424) [Peter Gerst]
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* Auto-extend and WIDTH warn on unsized X/Zs. (#1423) [Udi Finkelstein]
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* Fix missing VL_SHIFTL_ errors. (#1412) (#1415) [Larry Lee]
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* Fix missing VL_SHIFTL errors. (#1412) (#1415) [Larry Lee]
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* Fix MinGW GCC 6 printf formats. (#1413) [Sergey Kvachonok]
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* Fix test problems when missing fst2vcd. (#1417) [Todd Strader]
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* Fix GTKWave register warning. (#1421) [Pieter Kapsenberg]
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@ -626,7 +626,7 @@ Verilator 4.006 2018-10-27
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* Add --dump-defines.
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* For --trace-fst, save enum decoding information. (#1358) [Sergi Granell]
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(To visualize enumeration data you must use GTKwave 3.3.95 or newer.)
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* For --trace-fst, instead of *.fst.hier, put data into *.fst. [Tony Bybell]
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* For --trace-fst, combine hier information into FST. [Tony Bybell]
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* Fix --trace-lxt2 compile error on MinGW, msg2667. [HyungKi Jeong]
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* Fix Windows .exe not found. (#1361) [Patrick Stewart]
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@ -1960,7 +1960,7 @@ Verilator 3.700 2009-01-08
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more information on supported constructs.
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* Add --coverage_toggle for toggle coverage analysis.
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Running coverage now requires SystemPerl 1.301 or newer.
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* Add /*verilator coverage_on/_off */ to bracket coverage regions.
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* Add coverage_on/_off metacomments to bracket coverage regions.
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**Minor:**
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@ -2098,7 +2098,7 @@ Verilator 3.662 2008-04-25
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* Add Verilog 2005 $clog2() function.
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This is useful in calculating bus-widths from parameters.
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* Support /**/ comments in -f option files. [Stefan Thiede]
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* Support C-style comments in -f option files. [Stefan Thiede]
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* Add error message when modules have duplicate names. [Stefan Thiede]
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* Support defines terminated in EOF, though against spec. [Stefan Thiede]
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* Support optional argument to $finish and $stop. [by Stefan Thiede]
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@ -2224,7 +2224,7 @@ Verilator 3.652 2007-06-21
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* Support V2K portlists with "input a,b,...". [Mark Nodine]
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* Support V2K function/task argument lists.
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* Optimize constant $display arguments.
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* Fix Preprocessor dropping some `line directives. [Mark Nodine]
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* Fix preprocessor dropping some `line directives. [Mark Nodine]
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Verilator 3.651 2007-05-22
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@ -2944,7 +2944,7 @@ Verilator 3.300 2004-10-21
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**Major:**
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* New backend that eliminates most VL_ macros.
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* New backend that eliminates most VL macros.
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Improves performance 20%-50%, depending on frequency of use of signals
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over 64 bits. GCC compile times with -O2 shrink by a factor of 10.
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@ -3106,7 +3106,7 @@ Verilator 3.202 2004-01-27
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Verilator 3.201-beta 2003-12-10
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==========================
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===============================
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**Major:**
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@ -3402,8 +3402,8 @@ Verilator 3.004 2002-10-10
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**Minor:**
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* Add /* verilator module_inline */ and associated optimizations.
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* Allow /* verilator coverage_block_off */ in place of `coverage_block_off.
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* Add module_inline metacomment and associated optimizations.
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* Allow coverage_block_off metacomment in place of `coverage_block_off.
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This prevents problems with Emacs AUTORESET. [Ray Strouble]
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* Fix `coverage_block_off also disabling subsequent blocks.
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* Fix unrolling of loops with multiple simple statements.
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@ -287,9 +287,11 @@ This is a short summary of the arguments to the "verilator" executable.
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See L</"VERILATION ARGUMENTS"> for the detailed descriptions of these
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arguments.
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{file.v} Verilog package, module and top module filenames
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{file.c/cc/cpp} Optional C++ files to compile in
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{file.a/o/so} Optional C++ files to link in
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=for VL_SPHINX_EXTRACT "_build/gen/args_verilator.rst"
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<file.v> Verilog package, module and top module filenames
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<file.c/cc/cpp> Optional C++ files to compile in
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<file.a/o/so> Optional C++ files to link in
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+1364-1995ext+<ext> Use Verilog 1995 with file extension <ext>
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+1364-2001ext+<ext> Use Verilog 2001 with file extension <ext>
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@ -304,7 +306,7 @@ arguments.
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--bbox-unsup Blackbox unsupported language features
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--bin <filename> Override Verilator binary
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--build Build model executable/library after Verilation
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-CFLAGS <flags> C++ compiler flags for makefile
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-CFLAGS <flags> C++ compiler arguments for makefile
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--cc Create C++ output
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--cdc Clock domain crossing analysis
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--clk <signal-name> Mark specified signal as clock
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@ -334,8 +336,8 @@ arguments.
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-E Preprocess, but do not compile
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--error-limit <value> Abort after this number of errors
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--exe Link to create executable
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-F <file> Parse options from a file, relatively
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-f <file> Parse options from a file
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-F <file> Parse arguments from a file, relatively
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-f <file> Parse arguments from a file
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-FI <file> Force include of a file
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--flatten Force inlining of all modules, tasks and functions
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-G<name>=<value> Overwrite top-level parameter
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@ -352,12 +354,12 @@ arguments.
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+incdir+<dir> Directory to search for includes
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--inhibit-sim Create function to turn off sim
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--inline-mult <value> Tune module inlining
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-LDFLAGS <flags> Linker pre-object flags for makefile
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-LDFLAGS <flags> Linker pre-object arguments for makefile
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--l2-name <value> Verilog scope name of the top module
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--language <lang> Default language standard to parse
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+libext+<ext>+[ext]... Extensions for finding modules
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--lint-only Lint, but do not make output
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-MAKEFLAGS <flags> Options to make during --build
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-MAKEFLAGS <flags> Arguments to pass to make during --build
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--max-num-width <value> Maximum number width (default: 64K)
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--MMD Create .d dependency files
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--MP Create phony dependency targets
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@ -453,15 +455,18 @@ This is a short summary of the simulation runtime arguments, i.e. for the
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final Verilated simulation runtime models. See L</"SIMULATION RUNTIME
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ARGUMENTS"> for the detailed description of these arguments.
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=for VL_SPHINX_EXTRACT "_build/gen/args_verilated.rst"
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+verilator+debug Enable debugging
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+verilator+debugi+<value> Enable debugging at a level
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+verilator+error+limit+<value> Set error limit
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+verilator+help Display help
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+verilator+noassert Disable assert checking
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+verilator+prof+threads+file+<filename> Set profile filename
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+verilator+prof+threads+start+<value> Set profile starting point
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+verilator+prof+threads+window+<value> Set profile duration
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+verilator+rand+reset+<value> Set random reset technique
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+verilator+seed+<value> Set random seed
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+verilator+noassert Disable assert checking
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+verilator+V Verbose version and config
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+verilator+version Show version and exit
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@ -473,11 +478,11 @@ executable.
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=over 4
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=item {file.v}
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=item <file.v>
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Specifies the Verilog file containing the top module to be Verilated.
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=item {file.c/.cc/.cpp/.cxx}
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=item <file.c/.cc/.cpp/.cxx>
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Used with --exe to specify optional C++ files to be linked in with the
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Verilog code. The file path should either be absolute, or relative to
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@ -487,7 +492,7 @@ appropriate directory to find the file.
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See also the -CFLAGS and -LDFLAGS options, which are useful when the C++
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files need special compiler flags.
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=item {file.a/.o/.so}
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=item <file.a/.o/.so>
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Specifies optional object or library files to be linked in with the Verilog
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code, as a shorthand for -LDFLAGS "<file>". The file path should either be
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@ -698,7 +703,7 @@ Note Verilator may over-count combinatorial (non-clocked) blocks when those
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blocks receive signals which have had the UNOPTFLAT warning disabled; for
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most accurate results do not disable this warning when using coverage.
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=item --trace-max-width I<width>
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=item --coverage-max-width I<width>
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Rarely needed. Specify the maximum bit width of a signal that is subject
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to toggle coverage. Defaults to 256, as covering large vectors may greatly
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@ -763,8 +768,11 @@ is fairly standard across Verilog tools while -D is similar to GCC.
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Select the debug executable of Verilator (if available), and enable more
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internal assertions (equivalent to C<--debug-check>), debugging messages
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(equivalent to C<--debugi 3>), and intermediate form dump files (equivalent
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to C<--dump-treei 3>).
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(equivalent to C<--debugi 3>), intermediate form dump files (equivalent to
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C<--dump-treei 3>), and leak to make node numbers unique (--debug-leak).
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Verilator will also abort() instead of exit() if there are any errors
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detected.
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=item --debug-check
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@ -790,7 +798,8 @@ option has no effect.
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Rarely needed - for developer use. Set internal debugging level globally
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to the specified debug level (1-10) or set the specified Verilator source
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file to the specified level (e.g. C<--debugi-V3Width 9>). Higher levels
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produce more detailed messages.
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produce more detailed messages. See --debug for other implications of
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having debug on (at levels other than zero).
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=item --default-language I<value>
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@ -3070,8 +3079,9 @@ thread.
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=head1 CONFIGURATION FILES
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In addition to the command line, warnings and other features may be
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controlled by configuration files, typically named with the .vlt
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extension. An example:
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controlled by configuration files, typically named with the .vlt extension
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(what makes it a configuration file is the `verilator_config directive). An
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example:
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`verilator_config
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lint_off -rule WIDTH
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