forked from github/verilator
Support $size/$bits/etc on type references.
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@ -8,6 +8,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
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*** Support $error/$warning in elaboration time blocks.
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*** Support $size/$bits/etc on type references.
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**** Fix MacOS portability, bug1232. [Jeff Bush]
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**** Detect MSB overflow when under VL_DEBUG, bug1238. [Junyi Xi]
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@ -2686,34 +2686,32 @@ system_f_call<nodep>: // IEEE: system_tf_call (as func)
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| yaD_DPI parenE { $$ = new AstFuncRef($<fl>1,*$1,NULL); }
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| yaD_DPI '(' exprList ')' { $$ = new AstFuncRef($2,*$1,$3); GRAMMARP->argWrapList($$->castFuncRef()); }
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//
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| yD_BITS '(' data_type ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_BITS,$3); }
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| yD_BITS '(' data_type ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_BITS,$3,$5); }
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| yD_BITS '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_BITS,$3); }
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| yD_BITS '(' expr ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_BITS,$3,$5); }
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| yD_BITS '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_BITS,$3); }
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| yD_BITS '(' exprOrDataType ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_BITS,$3,$5); }
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| yD_BITSTOREAL '(' expr ')' { $$ = new AstBitsToRealD($1,$3); }
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| yD_C '(' cStrList ')' { $$ = (v3Global.opt.ignc() ? NULL : new AstUCFunc($1,$3)); }
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| yD_CEIL '(' expr ')' { $$ = new AstCeilD($1,$3); }
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| yD_CLOG2 '(' expr ')' { $$ = new AstCLog2($1,$3); }
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| yD_COUNTONES '(' expr ')' { $$ = new AstCountOnes($1,$3); }
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| yD_DIMENSIONS '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_DIMENSIONS,$3); }
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| yD_DIMENSIONS '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_DIMENSIONS,$3); }
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| yD_EXP '(' expr ')' { $$ = new AstExpD($1,$3); }
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| yD_FEOF '(' expr ')' { $$ = new AstFEof($1,$3); }
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| yD_FGETC '(' expr ')' { $$ = new AstFGetC($1,$3); }
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| yD_FGETS '(' idClassSel ',' expr ')' { $$ = new AstFGetS($1,$3,$5); }
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| yD_FLOOR '(' expr ')' { $$ = new AstFloorD($1,$3); }
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| yD_FSCANF '(' expr ',' str commaVRDListE ')' { $$ = new AstFScanF($1,*$5,$3,$6); }
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| yD_HIGH '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_HIGH,$3,NULL); }
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| yD_HIGH '(' expr ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_HIGH,$3,$5); }
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| yD_INCREMENT '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_INCREMENT,$3,NULL); }
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| yD_INCREMENT '(' expr ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_INCREMENT,$3,$5); }
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| yD_HIGH '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_HIGH,$3,NULL); }
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| yD_HIGH '(' exprOrDataType ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_HIGH,$3,$5); }
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| yD_INCREMENT '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_INCREMENT,$3,NULL); }
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| yD_INCREMENT '(' exprOrDataType ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_INCREMENT,$3,$5); }
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| yD_ISUNKNOWN '(' expr ')' { $$ = new AstIsUnknown($1,$3); }
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| yD_ITOR '(' expr ')' { $$ = new AstIToRD($1,$3); }
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| yD_LEFT '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_LEFT,$3,NULL); }
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| yD_LEFT '(' expr ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_LEFT,$3,$5); }
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| yD_LEFT '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_LEFT,$3,NULL); }
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| yD_LEFT '(' exprOrDataType ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_LEFT,$3,$5); }
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| yD_LN '(' expr ')' { $$ = new AstLogD($1,$3); }
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| yD_LOG10 '(' expr ')' { $$ = new AstLog10D($1,$3); }
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| yD_LOW '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_LOW,$3,NULL); }
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| yD_LOW '(' expr ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_LOW,$3,$5); }
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| yD_LOW '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_LOW,$3,NULL); }
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| yD_LOW '(' exprOrDataType ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_LOW,$3,$5); }
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| yD_ONEHOT '(' expr ')' { $$ = new AstOneHot($1,$3); }
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| yD_ONEHOT0 '(' expr ')' { $$ = new AstOneHot0($1,$3); }
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| yD_POW '(' expr ',' expr ')' { $$ = new AstPowD($1,$3,$5); }
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@ -2721,20 +2719,20 @@ system_f_call<nodep>: // IEEE: system_tf_call (as func)
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| yD_RANDOM parenE { $$ = new AstRand($1); }
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| yD_REALTIME parenE { $$ = new AstTimeD($1); }
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| yD_REALTOBITS '(' expr ')' { $$ = new AstRealToBits($1,$3); }
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| yD_RIGHT '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_RIGHT,$3,NULL); }
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| yD_RIGHT '(' expr ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_RIGHT,$3,$5); }
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| yD_RIGHT '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_RIGHT,$3,NULL); }
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| yD_RIGHT '(' exprOrDataType ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_RIGHT,$3,$5); }
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| yD_RTOI '(' expr ')' { $$ = new AstRToIS($1,$3); }
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| yD_SFORMATF '(' str commaEListE ')' { $$ = new AstSFormatF($1,*$3,false,$4); }
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| yD_SIGNED '(' expr ')' { $$ = new AstSigned($1,$3); }
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| yD_SIZE '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_SIZE,$3,NULL); }
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| yD_SIZE '(' expr ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_SIZE,$3,$5); }
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| yD_SIZE '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_SIZE,$3,NULL); }
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| yD_SIZE '(' exprOrDataType ',' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_SIZE,$3,$5); }
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| yD_SQRT '(' expr ')' { $$ = new AstSqrtD($1,$3); }
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| yD_SSCANF '(' expr ',' str commaVRDListE ')' { $$ = new AstSScanF($1,*$5,$3,$6); }
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| yD_STIME parenE { $$ = new AstSel($1,new AstTime($1),0,32); }
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| yD_SYSTEM '(' expr ')' { $$ = new AstSystemF($1,$3); }
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| yD_TESTPLUSARGS '(' str ')' { $$ = new AstTestPlusArgs($1,*$3); }
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| yD_TIME parenE { $$ = new AstTime($1); }
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| yD_UNPACKED_DIMENSIONS '(' expr ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_UNPK_DIMENSIONS,$3); }
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| yD_UNPACKED_DIMENSIONS '(' exprOrDataType ')' { $$ = new AstAttrOf($1,AstAttrType::DIM_UNPK_DIMENSIONS,$3); }
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| yD_UNSIGNED '(' expr ')' { $$ = new AstUnsigned($1,$3); }
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| yD_VALUEPLUSARGS '(' expr ',' expr ')' { $$ = new AstValuePlusArgs($1,$3,$5); }
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;
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@ -2761,6 +2759,8 @@ exprOrDataType<nodep>: // expr | data_type: combined to prevent conflicts
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expr { $$ = $1; }
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// // data_type includes id that overlaps expr, so special flavor
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| data_type { $$ = $1; }
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// // not in spec, but needed for $past(sig,1,,@(posedge clk))
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//UNSUP event_control { }
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;
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list_of_argumentsE<nodep>: // IEEE: [list_of_arguments]
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@ -43,6 +43,8 @@ module array_test
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reg [7:0] a [LEFT:RIGHT];
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// verilator lint_on LITENDIAN
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typedef reg [7:0] r_t;
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integer l;
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integer r;
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integer s;
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@ -57,6 +59,7 @@ module array_test
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`endif
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if ((l != LEFT) || (r != RIGHT) || (s != (RIGHT - LEFT + 1))) $stop;
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if ($left(r_t)!=7 || $right(r_t)!=0 || $size(r_t)!=8 || $bits(r_t) !=8) $stop;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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