forked from github/verilator
Duplicate clock gate optimization on by default, use -Od to disable
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@ -7,6 +7,8 @@ indicates the contributor was also the author of the fix; Thanks!
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** Support interfaces and modports, bug102. [Byron Bradley, Jeremy Bennett]
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*** Duplicate clock gate optimization on by default, bug621.
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**** Fix arrayed input compile error, bug645. [Krzysztof Jankowski]
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**** Fix GCC version runtime changes, bug651. [Jeremy Bennett]
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@ -1307,7 +1307,7 @@ void V3Options::optimize(int level) {
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m_oSubst = flag;
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m_oSubstConst = flag;
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m_oTable = flag;
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m_oDedupe = level >= 3;
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m_oDedupe = flag;
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// And set specific optimization levels
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if (level >= 3) {
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m_inlineMult = -1; // Maximum inlining
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