forked from github/verilator
Simplify VL_CONST_W macro generation for faster compiles.
This commit is contained in:
Wilson Snyder
parent
ce16f7689d
commit
38ab22bf1d
2
Changes
2
Changes
@ -12,6 +12,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
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**** Add performance information to --stats file.
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**** Simplify VL_CONST_W macro generation for faster compiles.
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**** Fix LITENDIAN warning on arrayed cells, bug1202. [Mike Popoloski]
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**** Fix enum ranges without colons, bug1204. [Mike Popoloski]
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@ -1895,64 +1895,97 @@ static inline WDataOutP VL_COND_WIWW(int obits, int, int, int,
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// Constification
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// VL_CONST_W_#X(int obits, WDataOutP owp, IData data0, .... IData data(#-1))
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// Sets wide vector words to specified constant words, zeros upper data.
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// Sets wide vector words to specified constant words.
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// These macros are used when o might represent more words then are given as constants,
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// hence all upper words must be zeroed.
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// If changing the number of functions here, also change EMITCINLINES_NUM_CONSTW
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#define _END(obits,wordsSet) \
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for(int i=(wordsSet);i<VL_WORDS_I(obits);++i) o[i] = (IData)0x0; \
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return o
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#define VL_HAVE_CONST_W_1X
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static inline WDataOutP VL_CONST_W_1X(int obits, WDataOutP o,
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IData d0) {
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o[0]=d0;
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_END(obits,1); }
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#define VL_HAVE_CONST_W_2X
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static inline WDataOutP VL_CONST_W_2X(int obits, WDataOutP o,
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IData d1,IData d0) {
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o[0]=d0; o[1]=d1;
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_END(obits,2); }
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#define VL_HAVE_CONST_W_3X
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static inline WDataOutP VL_CONST_W_3X(int obits, WDataOutP o,
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IData d2,IData d1,IData d0) {
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o[0]=d0; o[1]=d1; o[2]=d2;
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_END(obits,3); }
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#define VL_HAVE_CONST_W_4X
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static inline WDataOutP VL_CONST_W_4X(int obits, WDataOutP o,
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IData d3,IData d2,IData d1,IData d0) {
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3;
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_END(obits,4); }
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#define VL_HAVE_CONST_W_5X
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static inline WDataOutP VL_CONST_W_5X(int obits, WDataOutP o,
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IData d4,IData d3,IData d2,IData d1,IData d0) {
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4;
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_END(obits,5); }
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#define VL_HAVE_CONST_W_6X
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static inline WDataOutP VL_CONST_W_6X(int obits, WDataOutP o,
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IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5;
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_END(obits,6); }
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#define VL_HAVE_CONST_W_7X
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static inline WDataOutP VL_CONST_W_7X(int obits, WDataOutP o,
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IData d6,IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6;
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_END(obits,7); }
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#define VL_HAVE_CONST_W_8X
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static inline WDataOutP VL_CONST_W_8X(int obits, WDataOutP o,
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IData d7,IData d6,IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
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_END(obits,8); }
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#define VL_HAVE_CONST_W_9X
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static inline WDataOutP VL_CONST_W_9X(int obits, WDataOutP o,
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IData d8,
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IData d7,IData d6,IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
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//
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static inline WDataOutP VL_CONSTHI_W_1X(int obits, int lsb, WDataOutP obase,
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IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0;
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_END(obits,1); }
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static inline WDataOutP VL_CONSTHI_W_2X(int obits, int lsb, WDataOutP obase,
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IData d1,IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0; o[1]=d1;
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_END(obits,2); }
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static inline WDataOutP VL_CONSTHI_W_3X(int obits, int lsb, WDataOutP obase,
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IData d2,IData d1,IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0; o[1]=d1; o[2]=d2;
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_END(obits,3); }
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static inline WDataOutP VL_CONSTHI_W_4X(int obits, int lsb, WDataOutP obase,
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IData d3,IData d2,IData d1,IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3;
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_END(obits,4); }
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static inline WDataOutP VL_CONSTHI_W_5X(int obits, int lsb, WDataOutP obase,
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IData d4,IData d3,IData d2,IData d1,IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4;
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_END(obits,5); }
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static inline WDataOutP VL_CONSTHI_W_6X(int obits, int lsb, WDataOutP obase,
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IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5;
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_END(obits,6); }
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static inline WDataOutP VL_CONSTHI_W_7X(int obits, int lsb, WDataOutP obase,
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IData d6,IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6;
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_END(obits,7); }
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static inline WDataOutP VL_CONSTHI_W_8X(int obits, int lsb, WDataOutP obase,
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IData d7,IData d6,IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
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o[8]=d8;
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_END(obits,9); }
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_END(obits,8); }
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#undef _END
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// Partial constant, lower words of vector wider than 8*32, starting at bit number lsb
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static inline void VL_CONSTLO_W_8X(int lsb, WDataOutP obase,
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IData d7, IData d6, IData d5, IData d4, IData d3, IData d2, IData d1, IData d0) {
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WDataOutP o = obase + VL_WORDS_I(lsb);
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o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7; }
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//======================================================================
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#endif /*_VERILATED_H_*/
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@ -36,6 +36,8 @@
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#define VL_VALUE_STRING_MAX_WIDTH 8192 // We use a static char array in VL_VALUE_STRING
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#define EMITC_NUM_CONSTW 8 // Number of VL_CONST_W_*X's in verilated.h (IE VL_CONST_W_8X is last)
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//######################################################################
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// Emit statements and math operators
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@ -629,24 +631,64 @@ public:
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putsQuoted(nodep->num().toString());
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puts(")");
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} else if (nodep->isWide()) {
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putbs("VL_CONST_W_");
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puts(cvtToStr(VL_WORDS_I(nodep->num().widthMin())));
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puts("X(");
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puts(cvtToStr(nodep->widthMin()));
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puts(",");
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if (!assigntop) {
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puts(assignString);
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} else if (assigntop->castVarRef()) {
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puts(assigntop->hiername());
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puts(assigntop->varp()->name());
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} else {
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assigntop->iterateAndNext(*this);
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int upWidth = nodep->num().widthMin();
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int chunks = 0;
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if (upWidth > EMITC_NUM_CONSTW*VL_WORDSIZE) {
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// Output e.g. 8 words in groups of e.g. 8
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chunks = (upWidth-1) / (EMITC_NUM_CONSTW*VL_WORDSIZE);
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upWidth %= (EMITC_NUM_CONSTW*VL_WORDSIZE);
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if (upWidth == 0) upWidth = (EMITC_NUM_CONSTW*VL_WORDSIZE);
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}
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for (int word=VL_WORDS_I(nodep->num().widthMin())-1; word>0; word--) {
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// Only 32 bits - llx + long long here just to appease CPP format warning
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ofp()->printf(",0x%08" VL_PRI64 "x", (vluint64_t)(nodep->num().dataWord(word)));
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{ // Upper e.g. 8 words
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if (chunks) {
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putbs("VL_CONSTHI_W_");
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puts(cvtToStr(VL_WORDS_I(upWidth)));
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puts("X(");
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puts(cvtToStr(nodep->widthMin()));
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puts(",");
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puts(cvtToStr(chunks*EMITC_NUM_CONSTW*VL_WORDSIZE));
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} else {
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putbs("VL_CONST_W_");
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puts(cvtToStr(VL_WORDS_I(upWidth)));
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puts("X(");
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puts(cvtToStr(nodep->widthMin()));
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}
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puts(",");
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if (!assigntop) {
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puts(assignString);
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} else if (assigntop->castVarRef()) {
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puts(assigntop->hiername());
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puts(assigntop->varp()->name());
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} else {
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assigntop->iterateAndNext(*this);
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}
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for (int word=VL_WORDS_I(upWidth)-1; word>=0; word--) {
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// Only 32 bits - llx + long long here just to appease CPP format warning
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ofp()->printf(",0x%08" VL_PRI64 "x", (vluint64_t)(nodep->num().dataWord(word+chunks*EMITC_NUM_CONSTW)));
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}
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puts(")");
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}
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for (chunks--; chunks >= 0; chunks--) {
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puts(";\n");
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putbs("VL_CONSTLO_W_");
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puts(cvtToStr(EMITC_NUM_CONSTW));
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puts("X(");
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puts(cvtToStr(chunks*EMITC_NUM_CONSTW*VL_WORDSIZE));
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puts(",");
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if (!assigntop) {
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puts(assignString);
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} else if (assigntop->castVarRef()) {
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puts(assigntop->hiername());
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puts(assigntop->varp()->name());
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} else {
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assigntop->iterateAndNext(*this);
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}
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for (int word=EMITC_NUM_CONSTW-1; word>=0; word--) {
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// Only 32 bits - llx + long long here just to appease CPP format warning
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ofp()->printf(",0x%08" VL_PRI64 "x", (vluint64_t)(nodep->num().dataWord(word+chunks*EMITC_NUM_CONSTW)));
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}
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puts(")");
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}
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ofp()->printf(",0x%08" VL_PRI64 "x)", (vluint64_t)(nodep->num().dataWord(0)));
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} else if (nodep->isDouble()) {
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if (int(nodep->num().toDouble()) == nodep->num().toDouble()
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&& nodep->num().toDouble() < 1000
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@ -32,30 +32,15 @@
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#include "V3EmitCBase.h"
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#include "V3Stats.h"
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#define EMITCINLINES_NUM_CONSTW 10 // Number of VL_CONST_W_*X's in verilated.h (IE VL_CONST_W_9X is last)
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//######################################################################
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class EmitCInlines : EmitCBaseVisitor {
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// STATE
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vector<V3Double0> m_wordWidths; // What sizes are used?
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// METHODS
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void emitInt();
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// VISITORS
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virtual void visit(AstVar* nodep) {
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// All wide constants load into variables, so we can just hunt for them
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nodep->iterateChildren(*this);
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int words = nodep->widthWords();
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if (words >= EMITCINLINES_NUM_CONSTW ) {
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if (int(m_wordWidths.size()) <= words) {
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m_wordWidths.resize(words+5);
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}
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++ m_wordWidths.at(words);
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v3Global.needHInlines(true);
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}
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}
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virtual void visit(AstBasicDType* nodep) {
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if (nodep->keyword() == AstBasicDTypeKwd::STRING) {
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v3Global.needHeavy(true); // #include <string> via verilated_heavy.h when we create symbol file
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@ -94,30 +79,7 @@ void EmitCInlines::emitInt() {
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puts("\n//======================\n\n");
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for (unsigned words=0; words<m_wordWidths.size(); words++) {
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if (m_wordWidths.at(words)) {
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puts("#ifndef VL_HAVE_CONST_W_"+cvtToStr(words)+"X\n");
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puts("# define VL_HAVE_CONST_W_"+cvtToStr(words)+"X\n");
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puts("static inline WDataOutP VL_CONST_W_"+cvtToStr(words)+"X(int obits, WDataOutP o\n");
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puts("\t");
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for (int i=words-1; i>=0; --i) {
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puts(",IData d"+cvtToStr(i));
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if (i && (i % 8 == 0)) puts("\n\t");
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}
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puts(") {\n");
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puts(" ");
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for (int i=words-1; i>=0; --i) {
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puts(" o["+cvtToStr(i)+"]=d"+cvtToStr(i)+";");
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if (i && (i % 8 == 0)) puts("\n ");
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}
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puts("\n");
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puts(" for(int i="+cvtToStr(words)+";i<VL_WORDS_I(obits);i++) o[i] = (IData)0x0;\n");
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puts(" return o;\n");
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puts("}\n");
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puts("#endif\n");
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puts("\n");
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}
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}
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// Placeholder - v3Global.needHInlines(true) currently not used
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puts("//======================\n\n");
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puts("#endif /*guard*/\n");
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@ -68,7 +68,7 @@ sub get_manifest_files {
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my $manifest_files = `cd $root && make dist-file-list`;
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$manifest_files =~ s!.*begin-dist-file-list:!!sg;
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$manifest_files =~ s!end-dist-file-list:.*$!!sg;
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print "MF $manifest_files\n";
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print "MF $manifest_files\n" if $Self->{verbose};
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my %files;
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foreach my $file (split /\s+/,$manifest_files) {
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next if $file eq '';
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@ -41,7 +41,7 @@ sub get_manifest_files {
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my $manifest_files = `cd $root && make dist-file-list`;
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$manifest_files =~ s!.*begin-dist-file-list:!!sg;
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$manifest_files =~ s!end-dist-file-list:.*$!!sg;
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print "MF $manifest_files\n";
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print "MF $manifest_files\n" if $Self->{verbose};
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my %files;
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foreach my $file (split /\s+/,$manifest_files) {
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next if $file eq '';
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@ -1,4 +1,9 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2015 by Wilson Snyder.
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`define checkhw(gotv,w,expv) do if (gotv[(w)*32+:$bits(expv)] !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv[(w)*32+:32]), (expv)); $stop; end while(0);
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module t (/*AUTOARG*/
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// Inputs
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@ -10,27 +15,53 @@ module t (/*AUTOARG*/
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reg [63:0] crc;
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reg [63:0] sum;
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reg [2*32-1:0] w2; initial w2 = {2 {32'h12345678}};
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reg [9*32-1:0] w9; initial w9 = {9 {32'h12345678}};
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reg [10*32-1:0] w10; initial w10 = {10{32'h12345678}};
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reg [11*32-1:0] w11; initial w11 = {11{32'h12345678}};
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reg [15*32-1:0] w15; initial w15 = {15{32'h12345678}};
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reg [31*32-1:0] w31; initial w31 = {31{32'h12345678}};
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reg [47*32-1:0] w47; initial w47 = {47{32'h12345678}};
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reg [63*32-1:0] w63; initial w63 = {63{32'h12345678}};
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bit [4*32-1:0] w4 = {32'h7c709753, 32'hbc8f6059, 32'h3b0db464, 32'h721a8fad};
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bit [8*32-2:0] w8m = {31'h7146e1bf, 32'ha8549e42, 32'hca6960bd, 32'h191b7f9b, 32'h93d79866, 32'hf4489e2b, 32'h8e9a3236, 32'h1d2a2d1d};
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bit [8*32-1:0] w8 = {32'hc211addc, 32'he5d4a057, 32'h5cbf88fe, 32'h42cf42e2, 32'heb584263, 32'ha585f118, 32'h231531c8, 32'hc73f7b06};
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bit [8*32-0:0] w8p = {1'b1, 32'h096aa54b, 32'h48aae18e, 32'hf9502cea, 32'h518c8b61, 32'h9e8641a2, 32'h0dc0249c, 32'hd421a87a, 32'hb8ee9199};
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bit [9*32-1:0] w9 = {32'hca800ac1,
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32'h0de4823a, 32'ha51663ac, 32'h96351446, 32'h6b0bbcd5, 32'h4a64b530, 32'h4967d59a, 32'hfcc17292, 32'h57926621};
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||||
bit [16*32-2:0] w16m = {31'h77ad72c7, 32'h73aa9cbb, 32'h7ecf026d, 32'h985a3ed2, 32'hfe961c1d, 32'h7a01df72, 32'h79e13d71, 32'hb69e2e32,
|
||||
32'h09fcbc45, 32'hcfd738c1, 32'hc197ac7c, 32'hc316d727, 32'h903034e4, 32'h92a047d1, 32'h6a5357af, 32'ha82ce9c8};
|
||||
|
||||
bit [16*32-1:0] w16 = {32'he49548a7, 32'ha02336a2, 32'h2bb48f0d, 32'h9974e098, 32'h34ae644f, 32'hca46dc2c, 32'h9f71a468, 32'h64ae043e,
|
||||
32'h7bc94d66, 32'h57aba588, 32'h5b9bb4fe, 32'hb87ed644, 32'hd34b5b20, 32'h712928de, 32'h4bdbd28e, 32'ha0576784};
|
||||
|
||||
bit [16*32-0:0] w16p = {1'b1, 32'hd278a306, 32'h374ce262, 32'hb608c88e, 32'h43d3e446, 32'h42e26866, 32'h44c31148, 32'hd3db659f, 32'hb3b84b2e,
|
||||
32'h1aa7a184, 32'h73b28538, 32'h6384e801, 32'h98d58e00, 32'h9c1d1429, 32'hb407730e, 32'he974c1fd, 32'he787c302};
|
||||
|
||||
bit [17*32-1:0] w17 = {32'hf1e322ac,
|
||||
32'hbbdbd761, 32'h760fe07d, 32'h3808cb28, 32'haf313051, 32'h37dc63b9, 32'hdddb418b, 32'he65a9d64, 32'hc1b6ab23,
|
||||
32'h11131ac1, 32'h0050e0bc, 32'h442e3754, 32'h0eb4556e, 32'hd153064b, 32'h41349f97, 32'hb6f4149f, 32'h34bb1fb1};
|
||||
|
||||
function [7:0] bytehash (input [32*32-1:0] data);
|
||||
integer i;
|
||||
bytehash = 0;
|
||||
for (i=0; i<32*32; ++i) begin
|
||||
bytehash = {bytehash[0], bytehash[7:1]} ^ data[i +: 8];
|
||||
end
|
||||
return bytehash;
|
||||
endfunction
|
||||
|
||||
// Aggregate outputs into a single result vector
|
||||
wire [63:0] result = (w2[63:0]
|
||||
^ w9[64:1]
|
||||
^ w10[65:2]
|
||||
^ w11[66:3]
|
||||
^ w15[67:4]
|
||||
^ w31[68:5]
|
||||
^ w47[69:6]
|
||||
^ w63[70:7]);
|
||||
// verilator lint_off WIDTH
|
||||
wire [63:0] result = (bytehash(w4)
|
||||
^ bytehash(w8m)
|
||||
^ bytehash(w8)
|
||||
^ bytehash(w8p)
|
||||
^ bytehash(w9)
|
||||
^ bytehash(w16m)
|
||||
^ bytehash(w16)
|
||||
^ bytehash(w16p)
|
||||
^ bytehash(w17));
|
||||
// verilator lint_on WIDTH
|
||||
|
||||
// What checksum will we end up with
|
||||
`define EXPECTED_SUM 64'h184cb39122d8c6e3
|
||||
`define EXPECTED_SUM 64'hb6fdb64085fc17f5
|
||||
|
||||
// Test loop
|
||||
always @ (posedge clk) begin
|
||||
@ -43,19 +74,76 @@ module t (/*AUTOARG*/
|
||||
if (cyc==0) begin
|
||||
// Setup
|
||||
crc <= 64'h5aef0c8d_d70a4497;
|
||||
// verilator lint_off SELRANGE
|
||||
`checkhw(w4,3,32'h7c709753);
|
||||
`checkhw(w4,2,32'hbc8f6059);
|
||||
`checkhw(w4,1,32'h3b0db464);
|
||||
`checkhw(w4,0,32'h721a8fad);
|
||||
`checkhw(w8m,7,31'h7146e1bf);
|
||||
`checkhw(w8m,6,32'ha8549e42);
|
||||
`checkhw(w8m,5,32'hca6960bd);
|
||||
`checkhw(w8m,4,32'h191b7f9b);
|
||||
`checkhw(w8m,3,32'h93d79866);
|
||||
`checkhw(w8m,2,32'hf4489e2b);
|
||||
`checkhw(w8m,1,32'h8e9a3236);
|
||||
`checkhw(w8m,0,32'h1d2a2d1d);
|
||||
`checkhw(w8,7,32'hc211addc);
|
||||
`checkhw(w8,6,32'he5d4a057);
|
||||
`checkhw(w8,5,32'h5cbf88fe);
|
||||
`checkhw(w8,4,32'h42cf42e2);
|
||||
`checkhw(w8,3,32'heb584263);
|
||||
`checkhw(w8,2,32'ha585f118);
|
||||
`checkhw(w8,1,32'h231531c8);
|
||||
`checkhw(w8,0,32'hc73f7b06);
|
||||
`checkhw(w8p,8,1'b1);
|
||||
`checkhw(w8p,7,32'h096aa54b);
|
||||
`checkhw(w8p,6,32'h48aae18e);
|
||||
`checkhw(w8p,5,32'hf9502cea);
|
||||
`checkhw(w8p,4,32'h518c8b61);
|
||||
`checkhw(w8p,3,32'h9e8641a2);
|
||||
`checkhw(w8p,2,32'h0dc0249c);
|
||||
`checkhw(w8p,1,32'hd421a87a);
|
||||
`checkhw(w8p,0,32'hb8ee9199);
|
||||
`checkhw(w9,8,32'hca800ac1);
|
||||
`checkhw(w9,7,32'h0de4823a);
|
||||
`checkhw(w9,6,32'ha51663ac);
|
||||
`checkhw(w9,5,32'h96351446);
|
||||
`checkhw(w9,4,32'h6b0bbcd5);
|
||||
`checkhw(w9,3,32'h4a64b530);
|
||||
`checkhw(w9,2,32'h4967d59a);
|
||||
`checkhw(w9,1,32'hfcc17292);
|
||||
`checkhw(w9,0,32'h57926621);
|
||||
`checkhw(w16m,15,31'h77ad72c7);
|
||||
`checkhw(w16m,14,32'h73aa9cbb);
|
||||
`checkhw(w16m,13,32'h7ecf026d);
|
||||
`checkhw(w16m,12,32'h985a3ed2);
|
||||
`checkhw(w16m,11,32'hfe961c1d);
|
||||
`checkhw(w16m,10,32'h7a01df72);
|
||||
`checkhw(w16m,9,32'h79e13d71);
|
||||
`checkhw(w16m,8,32'hb69e2e32);
|
||||
`checkhw(w16m,7,32'h09fcbc45);
|
||||
`checkhw(w16m,6,32'hcfd738c1);
|
||||
`checkhw(w16m,5,32'hc197ac7c);
|
||||
`checkhw(w16m,4,32'hc316d727);
|
||||
`checkhw(w16m,3,32'h903034e4);
|
||||
`checkhw(w16m,2,32'h92a047d1);
|
||||
`checkhw(w16m,1,32'h6a5357af);
|
||||
`checkhw(w16m,0,32'ha82ce9c8);
|
||||
// verilator lint_on SELRANGE
|
||||
end
|
||||
else if (cyc<10) begin
|
||||
sum <= 64'h0;
|
||||
end
|
||||
else if (cyc<90) begin
|
||||
w2 <= w2 >> 1;
|
||||
w9 <= w9 >> 1;
|
||||
w10 <= w10 >> 1;
|
||||
w11 <= w11 >> 1;
|
||||
w15 <= w15 >> 1;
|
||||
w31 <= w31 >> 1;
|
||||
w47 <= w47 >> 1;
|
||||
w63 <= w63 >> 1;
|
||||
w4 = w4 >>> 1;
|
||||
w8m = w8m >>> 1;
|
||||
w8 = w8 >>> 1;
|
||||
w8p = w8p >>> 1;
|
||||
w9 = w9 >>> 1;
|
||||
w16m = w16m >>> 1;
|
||||
w16 = w16 >>> 1;
|
||||
w16p = w16p >>> 1;
|
||||
w17 = w17 >>> 1;
|
||||
end
|
||||
else if (cyc==99) begin
|
||||
$write("[%0t] cyc==%0d crc=%x sum=%x\n",$time, cyc, crc, sum);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user