forked from github/verilator
Fix $size on dynamic strings (#3216).
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Changes
3
Changes
@ -27,7 +27,8 @@ Verilator 4.215 devel
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* Fix display of empty string constant (#3207). [Julie Schwartz]
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* Fix incorrect width after and-or optimization (#3208). [Julie Schwartz]
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* Fix $fopen etc on integer arrays (#3214). [adrienlemasle]
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* Fix %0 format on $value$plusargs.
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* Fix $size on dynamic strings (#3216).
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* Fix %0 format on $value$plusargs (#3217).
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Verilator 4.214 2021-10-17
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@ -1351,7 +1351,8 @@ private:
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case AstAttrType::DIM_RIGHT:
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case AstAttrType::DIM_SIZE: {
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UASSERT_OBJ(nodep->fromp() && nodep->fromp()->dtypep(), nodep, "Unsized expression");
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if (VN_IS(nodep->fromp()->dtypep(), QueueDType)) {
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AstNodeDType* const dtypep = nodep->fromp()->dtypep();
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if (VN_IS(dtypep, QueueDType)) {
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switch (nodep->attrType()) {
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case AstAttrType::DIM_SIZE: {
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AstNode* const newp = new AstCMethodHard(
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@ -1398,26 +1399,34 @@ private:
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default: nodep->v3error("Unhandled attribute type");
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}
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} else {
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std::pair<uint32_t, uint32_t> dimpair
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= nodep->fromp()->dtypep()->skipRefp()->dimensions(true);
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uint32_t msbdim = dimpair.first + dimpair.second;
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const std::pair<uint32_t, uint32_t> dimpair = dtypep->skipRefp()->dimensions(true);
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const uint32_t msbdim = dimpair.first + dimpair.second;
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if (!nodep->dimp() || msbdim < 1) {
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const int dim = 1;
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AstConst* const newp = dimensionValue(
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nodep->fileline(), nodep->fromp()->dtypep(), nodep->attrType(), dim);
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nodep->replaceWith(newp);
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VL_DO_DANGLING(nodep->deleteTree(), nodep);
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if (VN_IS(dtypep, BasicDType) && dtypep->basicp()->isString()) {
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// IEEE undocumented but $bits(string) must give length(string) * 8
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AstNode* const newp = new AstShiftL{
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nodep->fileline(),
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new AstLenN{nodep->fileline(), nodep->fromp()->unlinkFrBack()},
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new AstConst{nodep->fileline(), 3}, // * 8
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32};
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nodep->replaceWith(newp);
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VL_DO_DANGLING(pushDeletep(nodep), nodep);
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} else {
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const int dim = 1;
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AstConst* const newp
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= dimensionValue(nodep->fileline(), dtypep, nodep->attrType(), dim);
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nodep->replaceWith(newp);
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VL_DO_DANGLING(nodep->deleteTree(), nodep);
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}
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} else if (VN_IS(nodep->dimp(), Const)) {
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const int dim = VN_AS(nodep->dimp(), Const)->toSInt();
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AstConst* const newp = dimensionValue(
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nodep->fileline(), nodep->fromp()->dtypep(), nodep->attrType(), dim);
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AstConst* const newp
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= dimensionValue(nodep->fileline(), dtypep, nodep->attrType(), dim);
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nodep->replaceWith(newp);
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VL_DO_DANGLING(nodep->deleteTree(), nodep);
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} else { // Need a runtime lookup table. Yuk.
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UASSERT_OBJ(nodep->fromp() && nodep->fromp()->dtypep(), nodep,
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"Unsized expression");
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AstVar* const varp
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= dimensionVarp(nodep->fromp()->dtypep(), nodep->attrType(), msbdim);
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UASSERT_OBJ(nodep->fromp() && dtypep, nodep, "Unsized expression");
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AstVar* const varp = dimensionVarp(dtypep, nodep->attrType(), msbdim);
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AstNode* const dimp = nodep->dimp()->unlinkFrBack();
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AstVarRef* const varrefp
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= new AstVarRef(nodep->fileline(), varp, VAccess::READ);
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4
test_regress/t/t_string_size.out
Normal file
4
test_regress/t/t_string_size.out
Normal file
@ -0,0 +1,4 @@
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>< == ><
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>< == ><
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> < == > <
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*-* All Finished *-*
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22
test_regress/t/t_string_size.pl
Executable file
22
test_regress/t/t_string_size.pl
Executable file
@ -0,0 +1,22 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2021 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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compile(
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);
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execute(
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check_finished => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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27
test_regress/t/t_string_size.v
Normal file
27
test_regress/t/t_string_size.v
Normal file
@ -0,0 +1,27 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2021 by wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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module t;
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parameter string ES = "";
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parameter EI = ""; // B is an integer of width 8
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parameter string OS = "O";
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parameter OI = "O"; // B is an integer of width 8
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initial begin
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$display(">< == >%s<", "");
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$display(">< == >%s<", ES);
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$display("> < == >%s<", EI);
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if ($bits("") != 0) $stop;
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if ($bits("A") != 8) $stop;
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if ($bits(ES) != 0) $stop;
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if ($bits(OS) != 8) $stop;
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if ($bits(OI) != 8) $stop;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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