forked from github/verilator
Fix tracing SystemC signals with structures, bug858. Remove SC tracing of wrapper.
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Changes
4
Changes
@ -17,6 +17,10 @@ indicates the contributor was also the author of the fix; Thanks!
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*** Inline C functions that are used only once, msg1525. [Jie Xu]
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*** Fix tracing SystemC signals with structures, bug858. [Eivind Liland]
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Note that SystemC traces will no longer show the signals
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in the wrapper, they can be seen one level further down.
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**** Fix bare generates in interfaces, bug789. [Bob Newgard]
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@ -130,7 +130,12 @@ void V3LinkLevel::wrapTopCell(AstNetlist* netlistp) {
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oldvarp->primaryIO(true);
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varp->primaryIO(true);
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}
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if (varp->isIO() && v3Global.opt.systemC()) varp->sc(true);
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if (varp->isIO() && v3Global.opt.systemC()) {
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varp->sc(true);
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// User can see trace one level down from the wrapper
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// Avoids packing & unpacking SC signals a second time
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varp->trace(false);
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}
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AstPin* pinp = new AstPin(oldvarp->fileline(),0,oldvarp->name(),
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new AstVarRef(varp->fileline(),
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17
test_regress/t/t_trace_scstruct.pl
Executable file
17
test_regress/t/t_trace_scstruct.pl
Executable file
@ -0,0 +1,17 @@
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#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
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# redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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compile (
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verilator_flags2 => ['--sc --trace --trace-structs --pins-bv 2'],
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);
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#execute (); # didn't bother with top shell
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ok(1);
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1;
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26
test_regress/t/t_trace_scstruct.v
Normal file
26
test_regress/t/t_trace_scstruct.v
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@ -0,0 +1,26 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2014 by Wilson Snyder.
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// verilator lint_off UNUSED
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// verilator lint_off UNDRIVEN
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//bug858
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typedef struct packed {
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logic m_1;
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logic m_2;
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} struct_t;
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typedef struct packed {
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logic [94:0] m_1;
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logic m_2;
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} struct96_t;
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module t
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(
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input struct_t test_input,
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input struct96_t t96
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);
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endmodule
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