forked from github/verilator
Internals: Resolve misc bison comments with Verilog-Perl. No functional change.
This commit is contained in:
Wilson Snyder
parent
ec992c7f5e
commit
158e112752
@ -208,6 +208,9 @@ class AstSenTree;
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%token<strp> yaID__LEX "IDENTIFIER-in-lex"
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%token<strp> yaID__aPACKAGE "PACKAGE-IDENTIFIER"
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%token<strp> yaID__aTYPE "TYPE-IDENTIFIER"
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// Can't predecode aFUNCTION, can declare after use
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// Can't predecode aINTERFACE, can declare after use
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// Can't predecode aTASK, can declare after use
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// IEEE: integral_number
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%token<nump> yaINTNUM "INTEGER NUMBER"
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@ -697,7 +700,7 @@ package_or_generate_item_declaration<nodep>: // ==IEEE: package_or_generate_item
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//UNSUP extern_constraint_declaration { $$ = $1; }
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//UNSUP class_declaration { $$ = $1; }
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// // class_constructor_declaration is part of function_declaration
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| local_parameter_declaration { $$ = $1; }
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| local_parameter_declaration ';' { $$ = $1; }
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| parameter_declaration ';' { $$ = $1; }
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//UNSUP covergroup_declaration { $$ = $1; }
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//UNSUP overload_declaration { $$ = $1; }
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@ -826,10 +829,14 @@ port<nodep>: // ==IEEE: port
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// // IEEE: interface_port_header port_identifier { unpacked_dimension }
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// // Expanded interface_port_header
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// // We use instantCb here because the non-port form looks just like a module instantiation
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//UNSUP portDirNetE id/*interface*/ idAny/*port*/ rangeListE sigAttrListE { VARDTYPE($2); VARDONEA($<fl>3, $3, $4); PARSEP->instantCb($<fl>2, $2, $3, $4); PINNUMINC(); }
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//UNSUP portDirNetE yINTERFACE idAny/*port*/ rangeListE sigAttrListE { VARDTYPE($2); VARDONEA($<fl>3, $3, $4); PINNUMINC(); }
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//UNSUP portDirNetE id/*interface*/ '.' idAny/*modport*/ idAny/*port*/ rangeListE sigAttrListE { VARDTYPE($2); VARDONEA($<fl>5, $5, $6); PARSEP->instantCb($<fl>2, $2, $5, $6); PINNUMINC(); }
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//UNSUP portDirNetE yINTERFACE '.' idAny/*modport*/ idAny/*port*/ rangeListE sigAttrListE { VARDTYPE($2); VARDONEA($<fl>5, $5, $6); PINNUMINC(); }
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//UNSUP portDirNetE id/*interface*/ idAny/*port*/ rangeListE sigAttrListE
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//UNSUP { VARDTYPE($2); VARDONEA($<fl>3, $3, $4); PARSEP->instantCb($<fl>2, $2, $3, $4); PINNUMINC(); }
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//UNSUP portDirNetE yINTERFACE idAny/*port*/ rangeListE sigAttrListE
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//UNSUP { VARDTYPE($2); VARDONEA($<fl>3, $3, $4); PINNUMINC(); }
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//UNSUP portDirNetE id/*interface*/ '.' idAny/*modport*/ idAny/*port*/ rangeListE sigAttrListE
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//UNSUP { VARDTYPE($2); VARDONEA($<fl>5, $5, $6); PARSEP->instantCb($<fl>2, $2, $5, $6); PINNUMINC(); }
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//UNSUP portDirNetE yINTERFACE '.' idAny/*modport*/ idAny/*port*/ rangeListE sigAttrListE
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//UNSUP { VARDTYPE($2); VARDONEA($<fl>5, $5, $6); PINNUMINC(); }
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//
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// // IEEE: ansi_port_declaration, with [port_direction] removed
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// // IEEE: [ net_port_header | interface_port_header ] port_identifier { unpacked_dimension } [ '=' constant_expression ]
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@ -856,11 +863,16 @@ port<nodep>: // ==IEEE: port
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//
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// // Note implicit rules looks just line declaring additional followon port
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// // No VARDECL("port") for implicit, as we don't want to declare variables for them
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//UNSUP portDirNetE data_type '.' portSig '(' portAssignExprE ')' sigAttrListE { UNSUP }
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//UNSUP portDirNetE yVAR data_type '.' portSig '(' portAssignExprE ')' sigAttrListE { UNSUP }
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//UNSUP portDirNetE yVAR implicit_type '.' portSig '(' portAssignExprE ')' sigAttrListE { UNSUP }
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//UNSUP portDirNetE signingE rangeList '.' portSig '(' portAssignExprE ')' sigAttrListE { UNSUP }
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//UNSUP portDirNetE /*implicit*/ '.' portSig '(' portAssignExprE ')' sigAttrListE { UNSUP }
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//UNSUP portDirNetE data_type '.' portSig '(' portAssignExprE ')' sigAttrListE
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//UNSUP { UNSUP }
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//UNSUP portDirNetE yVAR data_type '.' portSig '(' portAssignExprE ')' sigAttrListE
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//UNSUP { UNSUP }
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//UNSUP portDirNetE yVAR implicit_type '.' portSig '(' portAssignExprE ')' sigAttrListE
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//UNSUP { UNSUP }
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//UNSUP portDirNetE signingE rangeList '.' portSig '(' portAssignExprE ')' sigAttrListE
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//UNSUP { UNSUP }
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//UNSUP portDirNetE /*implicit*/ '.' portSig '(' portAssignExprE ')' sigAttrListE
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//UNSUP { UNSUP }
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//
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portDirNetE data_type portSig variable_dimensionListE sigAttrListE
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{ $$=$3; VARDTYPE($2); $$->addNextNull(VARDONEP($$,$4,$5)); }
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@ -982,7 +994,7 @@ genvar_identifierDecl<varp>: // IEEE: genvar_identifier (for declaration)
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local_parameter_declaration<nodep>: // IEEE: local_parameter_declaration
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// // See notes in parameter_declaration
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local_parameter_declarationFront list_of_param_assignments ';' { $$ = $2; }
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local_parameter_declarationFront list_of_param_assignments { $$ = $2; }
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;
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parameter_declaration<nodep>: // IEEE: parameter_declaration
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@ -1485,7 +1497,8 @@ module_or_generate_item<nodep>: // ==IEEE: module_or_generate_item
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// // IEEE: gate_instantiation + udp_instantiation + module_instantiation
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// // not here, see etcInst in module_common_item
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// // We joined udp & module definitions, so this goes here
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| table { $$ = $1; }
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| combinational_body { $$ = $1; }
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// // This module_common_item shared with interface_or_generate_item:module_common_item
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| module_common_item { $$ = $1; }
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;
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@ -1535,6 +1548,11 @@ module_or_generate_item_declaration<nodep>: // ==IEEE: module_or_generate_item_d
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//************************************************
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// Generates
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//
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// Way down in generate_item is speced a difference between module,
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// interface and checker generates. modules and interfaces are almost
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// identical (minus DEFPARAMs) so we overlap them. Checkers are too
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// different, so we copy all rules for checkers.
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generate_region<nodep>: // ==IEEE: generate_region
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yGENERATE genItemList yENDGENERATE { $$ = new AstGenerate($1, $2); }
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@ -1559,13 +1577,13 @@ genItemBegin<nodep>: // IEEE: part of generate_block
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;
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genItemOrBegin<nodep>: // Not in IEEE, but our begin isn't under generate_item
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generate_item { $$ = $1; }
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| genItemBegin { $$ = $1; }
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~c~generate_item { $$ = $1; }
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| ~c~genItemBegin { $$ = $1; }
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;
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genItemList<nodep>:
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genItemOrBegin { $$ = $1; }
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| genItemList genItemOrBegin { $$ = $1->addNextNull($2); }
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~c~genItemOrBegin { $$ = $1; }
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| ~c~genItemList ~c~genItemOrBegin { $$ = $1->addNextNull($2); }
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;
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generate_item<nodep>: // IEEE: module_or_interface_or_generate_item
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@ -1579,13 +1597,13 @@ generate_item<nodep>: // IEEE: module_or_interface_or_generate_item
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;
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conditional_generate_construct<nodep>: // ==IEEE: conditional_generate_construct
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yCASE '(' expr ')' case_generate_itemListE yENDCASE { $$ = new AstGenCase($1,$3,$5); }
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yCASE '(' expr ')' ~c~case_generate_itemListE yENDCASE { $$ = new AstGenCase($1,$3,$5); }
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| yIF '(' expr ')' generate_block_or_null %prec prLOWER_THAN_ELSE { $$ = new AstGenIf($1,$3,$5,NULL); }
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| yIF '(' expr ')' generate_block_or_null yELSE generate_block_or_null { $$ = new AstGenIf($1,$3,$5,$7); }
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;
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loop_generate_construct<nodep>: // ==IEEE: loop_generate_construct
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yFOR '(' genvar_initialization ';' expr ';' genvar_iteration ')' generate_block_or_null
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yFOR '(' genvar_initialization ';' expr ';' genvar_iteration ')' ~c~generate_block_or_null
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{ // Convert BEGIN(...) to BEGIN(GENFOR(...)), as we need the BEGIN to hide the local genvar
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AstBegin* lowerBegp = $9->castBegin();
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if ($9 && !lowerBegp) $9->v3fatalSrc("Child of GENFOR should have been begin");
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@ -1641,8 +1659,8 @@ case_generate_itemListE<nodep>: // IEEE: [{ case_generate_itemList }]
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;
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case_generate_itemList<nodep>: // IEEE: { case_generate_itemList }
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case_generate_item { $$=$1; }
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| case_generate_itemList case_generate_item { $$=$1; $1->addNext($2); }
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~c~case_generate_item { $$=$1; }
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| ~c~case_generate_itemList ~c~case_generate_item { $$=$1; $1->addNext($2); }
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;
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case_generate_item<nodep>: // ==IEEE: case_generate_item
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@ -1949,7 +1967,7 @@ stmtBlock<nodep>: // IEEE: statement + seq_block + par_block
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seq_block<nodep>: // ==IEEE: seq_block
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// // IEEE doesn't allow declarations in unnamed blocks, but several simulators do.
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// // So need begin's even if unnamed to scope variables down
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// // So need AstBegin's even if unnamed to scope variables down
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seq_blockFront blockDeclStmtList yEND endLabelE { $$=$1; $1->addStmtsp($2); SYMP->popScope($1); GRAMMARP->endLabel($<fl>4,$1,$4); }
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| seq_blockFront /**/ yEND endLabelE { $$=$1; SYMP->popScope($1); GRAMMARP->endLabel($<fl>3,$1,$3); }
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;
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@ -1973,7 +1991,7 @@ block_item_declarationList<nodep>: // IEEE: [ block_item_declaration ]
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block_item_declaration<nodep>: // ==IEEE: block_item_declaration
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data_declaration { $$ = $1; }
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| local_parameter_declaration { $$ = $1; }
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| local_parameter_declaration ';' { $$ = $1; }
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| parameter_declaration ';' { $$ = $1; }
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//UNSUP overload_declaration { $$ = $1; }
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//UNSUP let_declaration { $$ = $1; }
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@ -2299,6 +2317,14 @@ taskRef<parserefp>: // IEEE: part of tf_call
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;
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funcRef<parserefp>: // IEEE: part of tf_call
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// // package_scope/hierarchical_... is part of expr, so just need ID
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// // making-a id-is-a
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// // ----------------- ------------------
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// // tf_call tf_identifier expr (list_of_arguments)
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// // method_call(post .) function_identifier expr (list_of_arguments)
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// // property_instance property_identifier property_actual_arg
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// // sequence_instance sequence_identifier sequence_actual_arg
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// // let_expression let_identifier let_actual_arg
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idDotted '(' list_of_argumentsE ')' { $$ = new AstParseRef($1->fileline(), AstParseRefExp::PX_FTASK, "", $1, new AstFuncRef($2, "", $3)); $$->start(true); }
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| package_scopeIdFollows idDotted '(' list_of_argumentsE ')' { AstFuncRef* f=new AstFuncRef($3,"",$4); f->packagep($1); $$ = new AstParseRef($2->fileline(), AstParseRefExp::PX_FTASK, "", $2, f); $$->start(true); }
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//UNSUP: idDotted is really just id to allow dotted method calls
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@ -3050,7 +3076,7 @@ strengthSpecE: // IEEE: drive_strength + pullup_strength + pulldown_strength +
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//************************************************
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// Tables
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table<nodep>: // IEEE: combinational_body + sequential_body
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combinational_body<nodep>: // IEEE: combinational_body + sequential_body
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yTABLE tableEntryList yENDTABLE { $$ = new AstUdpTable($1,$2); }
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;
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@ -3224,6 +3250,8 @@ labeledStmt<nodep>:
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concurrent_assertion_item<nodep>: // IEEE: concurrent_assertion_item
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concurrent_assertion_statement { $$ = $1; }
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| id/*block_identifier*/ ':' concurrent_assertion_statement { $$ = new AstBegin($2,*$1,$3); }
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// // IEEE: checker_instantiation
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// // identical to module_instantiation; see etcInst
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;
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concurrent_assertion_statement<nodep>: // ==IEEE: concurrent_assertion_statement
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