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This commit is contained in:
Wilson Snyder 2023-03-24 19:06:07 -04:00
parent c55df02b1a
commit 14c8f072f1
1 changed files with 1 additions and 1 deletions
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test_regress/t/t_class_ref_as_arg_cast.pl
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@ -2,7 +2,7 @@
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2023 by Antmicro Ltd. This program is free software; you
# Copyright 2023 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.