forked from github/verilator
Fix is probably to mark as a clock
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db6ecbd57e
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120f62fe85
@ -353,7 +353,8 @@ class ProtectVisitor : public AstNVisitor {
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nodep->v3error("Unsupported: unpacked arrays with protect-lib on "<<nodep->prettyNameQ());
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nodep->v3error("Unsupported: unpacked arrays with protect-lib on "<<nodep->prettyNameQ());
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}
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}
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if (nodep->direction() == VDirection::INPUT) {
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if (nodep->direction() == VDirection::INPUT) {
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if (nodep->isUsedClock()) {
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if (nodep->isUsedClock()
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|| nodep->attrClocker() == VVarAttrClocker::CLOCKER_YES) {
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handleClock(nodep);
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handleClock(nodep);
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} else {
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} else {
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handleDataInput(nodep);
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handleDataInput(nodep);
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@ -25,7 +25,7 @@ module secret #(parameter GATED_CLK = 0)
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input [3:0] [31:0] s4x32_in,
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input [3:0] [31:0] s4x32_in,
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output logic [3:0] [31:0] s4x32_out,
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output logic [3:0] [31:0] s4x32_out,
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input clk_en,
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input clk_en,
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input clk);
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input clk /*verilator clocker*/);
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logic [31:0] secret_accum_q = 0;
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logic [31:0] secret_accum_q = 0;
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logic [31:0] secret_value = 7;
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logic [31:0] secret_value = 7;
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