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In errors, single quote signals and other from-user data.

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This commit is contained in:
Wilson Snyder 2019-07-11 22:09:30 -04:00
parent 83cf1882de
commit 0f857ce423
88 changed files with 287 additions and 281 deletions
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2
src/V3Active.cpp
View File

@ -408,7 +408,7 @@ private:
// V3LinkResolve should have cleaned most of these up
if (!nodep->varrefp()->width1()) {
nodep->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
<<nodep->varrefp()->prettyName());
<<nodep->varrefp()->prettyNameQ());
}
m_itemSequent = true;
nodep->varrefp()->varp()->usedClock(true);

3
src/V3Ast.h
View File

@ -1264,10 +1264,13 @@ public:
string shortName() const; // Name with __PVT__ removed for concatenating scopes
static string dedotName(const string& namein); // Name with dots removed
static string prettyName(const string& namein); // Name for printing out to the user
static string prettyNameQ(const string& namein) { // Quoted pretty name (for errors)
return string("'")+prettyName(namein)+"'"; }
static string encodeName(const string& namein); // Encode user name into internal C representation
static string encodeNumber(vlsint64_t num); // Encode number into internal C representation
static string vcdName(const string& namein); // Name for printing out to vcd files
string prettyName() const { return prettyName(name()); }
string prettyNameQ() const { return prettyNameQ(name()); }
string prettyTypeName() const; // "VARREF" for error messages
virtual string prettyOperatorName() const { return "operator "+prettyTypeName(); }
FileLine* fileline() const { return m_fileline; }

2
src/V3AstNodes.cpp
View File

@ -65,7 +65,7 @@ void AstNodeClassDType::repairMemberCache() {
clearCache();
for (AstMemberDType* itemp = membersp(); itemp; itemp=VN_CAST(itemp->nextp(), MemberDType)) {
if (m_members.find(itemp->name())!=m_members.end()) {
itemp->v3error("Duplicate declaration of member name: "<<itemp->prettyName()); }
itemp->v3error("Duplicate declaration of member name: "<<itemp->prettyNameQ()); }
else m_members.insert(make_pair(itemp->name(), itemp));
}
}

2
src/V3AstNodes.h
View File

@ -1634,7 +1634,7 @@ public:
return modVarp() ? ((modVarp()->direction().isAny()
? modVarp()->direction().prettyName()+" "
: "")
+"port connection '"+modVarp()->prettyName()+"'")
+"port connection "+modVarp()->prettyNameQ())
: "port connection"; }
bool dotStar() const { return name() == ".*"; } // Fake name for .* connections until linked
int pinNum() const { return m_pinNum; }

2
src/V3Cdc.cpp
View File

@ -424,7 +424,7 @@ private:
}
//UINFO(9," finalflop "<<targetp->name()<<" "<<targetp->nodep()->fileline()<<endl);
warnAndFile(markp->nodep(), V3ErrorCode::CDCRSTLOGIC,
"Logic in path that feeds async reset, via signal: "+nodep->prettyName());
"Logic in path that feeds async reset, via signal: "+nodep->prettyNameQ());
dumpAsyncRecurse(targetp, "", " ", 0);
}
bool dumpAsyncRecurse(CdcEitherVertex* vertexp, const string& prefix,

6
src/V3Changed.cpp
View File

@ -182,7 +182,7 @@ private:
if (debug()) nodep->dumpTree(cout, "-DETECTARRAY-class-");
m_vscp->v3warn(E_DETECTARRAY, "Unsupported: Can't detect changes on complex variable"
" (probably with UNOPTFLAT warning suppressed): "
<<m_vscp->varp()->prettyName());
<<m_vscp->varp()->prettyNameQ());
}
}
virtual void visit(AstNode* nodep) {
@ -190,7 +190,7 @@ private:
if (debug()) nodep->dumpTree(cout, "-DETECTARRAY-general-");
m_vscp->v3warn(E_DETECTARRAY, "Unsupported: Can't detect changes on complex variable"
" (probably with UNOPTFLAT warning suppressed): "
<<m_vscp->varp()->prettyName());
<<m_vscp->varp()->prettyNameQ());
}
public:
// CONSTUCTORS
@ -241,7 +241,7 @@ private:
VL_DEBUG_FUNC; // Declare debug()
void genChangeDet(AstVarScope* vscp) {
vscp->v3warn(IMPERFECTSCH, "Imperfect scheduling of variable: "<<vscp->prettyName());
vscp->v3warn(IMPERFECTSCH, "Imperfect scheduling of variable: "<<vscp->prettyNameQ());
ChangedInsertVisitor visitor (vscp, m_statep);
}

2
src/V3Clock.cpp
View File

@ -74,7 +74,7 @@ private:
if (vscp->user1p()) return static_cast<AstVarScope*>(vscp->user1p());
AstVar* varp = vscp->varp();
if (!varp->width1()) varp->v3error("Unsupported: Clock edge on non-single bit signal: "
<<varp->prettyName());
<<varp->prettyNameQ());
string newvarname = (string("__Vclklast__")
+vscp->scopep()->nameDotless()+"__"+varp->name());
AstVar* newvarp = new AstVar(vscp->fileline(),

4
src/V3Const.cpp
View File

@ -1622,7 +1622,7 @@ private:
}
if (!did && m_required) {
nodep->v3error("Expecting expression to be constant, but variable isn't const: "
<<nodep->varp()->prettyName());
<<nodep->varp()->prettyNameQ());
}
}
virtual void visit(AstEnumItemRef* nodep) {
@ -1640,7 +1640,7 @@ private:
}
if (!did && m_required) {
nodep->v3error("Expecting expression to be constant, but variable isn't const: "
<<nodep->itemp()->prettyName());
<<nodep->itemp()->prettyNameQ());
}
}

4
src/V3Delayed.cpp
View File

@ -114,7 +114,7 @@ private:
nodep->user5( nodep->user5() | flags );
if ((nodep->user5() & VU_DLY) && (nodep->user5() & VU_NONDLY)) {
nodep->v3warn(BLKANDNBLK, "Unsupported: Blocked and non-blocking assignments to same variable: "
<<nodep->varp()->prettyName());
<<nodep->varp()->prettyNameQ());
}
}
AstVarScope* createVarSc(AstVarScope* oldvarscp, const string& name,
@ -164,7 +164,7 @@ private:
&& !varrefp->varp()->user2()) {
varrefp->varp()->v3warn(
MULTIDRIVEN, "Signal has multiple driving blocks with different clocking: "
<<varrefp->varp()->prettyName()<<endl
<<varrefp->varp()->prettyNameQ()<<endl
<<varrefp->warnOther()<<"... Location of first driving block"<<endl
<<varrefp->varp()->warnContextPrimary()<<endl
<<oldactivep->warnOther()<<"... Location of other driving block"<<endl

2
src/V3EmitCSyms.cpp
View File

@ -106,7 +106,7 @@ class EmitCSyms : EmitCBaseVisitor {
// We'll still check here because the compiler errors
// resulting if we miss this warning are SO nasty
nodep->v3error("Symbol matching "+rsvd+" reserved word reached emitter,"
" should have hit SYMRSVDWORD: '"<<nodep->prettyName()<<"'");
" should have hit SYMRSVDWORD: "<<nodep->prettyNameQ());
}
}
}

6
src/V3Gate.cpp
View File

@ -559,9 +559,9 @@ void GateVisitor::optimizeSignals(bool allowMultiIn) {
// reasonable logic may have disappeared. Issuing a warning would
// thus be confusing. V3Undriven now handles this.
vvertexp->varScp()->varp()->v3warn
(UNDRIVEN, "Signal has no drivers "
(UNDRIVEN, "Signal has no drivers: '"
<<vvertexp->scopep()->prettyName()<<"."
<<vvertexp->varScp()->varp()->prettyName());
<<vvertexp->varScp()->varp()->prettyName()<<"'");
}
}
}
@ -821,7 +821,7 @@ void GateVisitor::warnSignals() {
) {
vscp->varp()->user2(true); // Warn only once per signal
vscp->v3warn(SYNCASYNCNET, "Signal flopped as both synchronous and async: "
<<vscp->prettyName()<<endl
<<vscp->prettyNameQ()<<endl
<<ap->warnOther()<<"... Location of async usage"<<endl
<<ap->warnContextPrimary()<<endl
<<sp->warnOther()<<"... Location of sync usage"<<endl

2
src/V3Inst.cpp
View File

@ -409,7 +409,7 @@ private:
if (!varNewp) {
if (debug()>=9) m_deModVars.dump();
nodep->v3fatalSrc("Module dearray failed for "
<<AstNode::prettyName(varNewName));
<<AstNode::prettyNameQ(varNewName));
}
// But clone the pin for each module instance

16
src/V3LinkCells.cpp
View File

@ -79,7 +79,7 @@ public:
void LinkCellsGraph::loopsMessageCb(V3GraphVertex* vertexp) {
if (LinkCellsVertex* vvertexp = dynamic_cast<LinkCellsVertex*>(vertexp)) {
vvertexp->modp()->v3error("Unsupported: Recursive multiple modules (module instantiates something leading back to itself): "
<<vvertexp->modp()->prettyName()<<endl
<<vvertexp->modp()->prettyNameQ()<<endl
<<V3Error::warnMore()
<<"... note: self-recursion (module instantiating itself directly) is supported.");
V3Error::abortIfErrors();
@ -151,7 +151,7 @@ private:
if (!modp) {
// This shouldn't throw a message as parseFile will create
// a AstNotFoundModule for us
nodep->v3error("Can't resolve module reference: "<<prettyName);
nodep->v3error("Can't resolve module reference: '"<<prettyName<<"'");
}
}
return modp;
@ -204,7 +204,7 @@ private:
m_declfnWarned.insert(nodep->fileline()->filename());
nodep->v3warn(DECLFILENAME, "Filename '"<<nodep->fileline()->filebasenameNoExt()
<<"' does not match "<<nodep->typeName()
<<" name: "<<nodep->prettyName());
<<" name: "<<nodep->prettyNameQ());
}
}
if (VN_IS(nodep, Iface) || VN_IS(nodep, Package)) nodep->inLibrary(true); // Interfaces can't be at top, unless asked
@ -241,7 +241,7 @@ private:
if (!nodep->cellp()) nodep->ifacep(VN_CAST(modp, Iface));
} else if (VN_IS(modp, NotFoundModule)) { // Will error out later
} else {
nodep->v3error("Non-interface used as an interface: "<<nodep->prettyName());
nodep->v3error("Non-interface used as an interface: "<<nodep->prettyNameQ());
}
}
// Note cannot do modport resolution here; modports are allowed underneath generates
@ -374,11 +374,11 @@ private:
if (!pinp->exprp()) {
if (pinp->name().substr(0, 11) == "__pinNumber") {
pinp->v3warn(PINNOCONNECT, "Cell pin is not connected: "
<<pinp->prettyName());
<<pinp->prettyNameQ());
} else {
pinp->v3warn(PINCONNECTEMPTY,
"Cell pin connected by name with empty reference: "
<<pinp->prettyName());
<<pinp->prettyNameQ());
}
}
if (ports.find(pinp->name()) == ports.end()) {
@ -403,7 +403,7 @@ private:
nodep->addPinsp(newp);
} else { // warn on the CELL that needs it, not the port
nodep->v3warn(PINMISSING, "Cell has missing pin: "
<<portp->prettyName());
<<portp->prettyNameQ());
AstPin* newp = new AstPin(nodep->fileline(), 0, portp->name(), NULL);
nodep->addPinsp(newp);
}
@ -464,7 +464,7 @@ private:
if (!(foundp->fileline()->warnIsOff(V3ErrorCode::MODDUP)
|| nodep->fileline()->warnIsOff(V3ErrorCode::MODDUP))) {
nodep->v3warn(MODDUP, "Duplicate declaration of module: "
<<nodep->prettyName()<<endl
<<nodep->prettyNameQ()<<endl
<<nodep->warnContextPrimary()<<endl
<<foundp->warnOther()<<"... Location of original declaration"<<endl
<<foundp->warnContextSecondary());

104
src/V3LinkDot.cpp
View File

@ -226,14 +226,14 @@ public:
UINFO(4,"Var2 "<<fnodep<<endl);
if (nodep->type() == fnodep->type()) {
nodep->v3error("Duplicate declaration of "<<nodeTextType(fnodep)
<<": "<<nodep->prettyName()<<endl
<<": "<<nodep->prettyNameQ()<<endl
<<nodep->warnContextPrimary()<<endl
<<fnodep->warnOther()<<"... Location of original declaration\n"
<<fnodep->warnContextSecondary());
} else {
nodep->v3error("Unsupported in C: "<<ucfirst(nodeTextType(nodep))
<<" has the same name as "
<<nodeTextType(fnodep)<<": "<<nodep->prettyName()<<endl
<<nodeTextType(fnodep)<<": "<<nodep->prettyNameQ()<<endl
<<nodep->warnContextPrimary()<<endl
<<fnodep->warnOther()<<"... Location of original declaration\n"
<<fnodep->warnContextSecondary());
@ -404,14 +404,14 @@ public:
if (!ifacerefp->ifaceViaCellp()) {
if (!ifacerefp->cellp()) { // Probably a NotFoundModule, or a normal module if made mistake
ifacerefp->v3error("Cannot find file containing interface: "
<<AstNode::prettyName(ifacerefp->ifaceName()));
<<AstNode::prettyNameQ(ifacerefp->ifaceName()));
continue;
} else {
ifacerefp->v3fatalSrc("Unlinked interface");
}
} else if (ifacerefp->ifaceViaCellp()->dead()) {
ifacerefp->v3error("Parent cell's interface is not found: "
<<AstNode::prettyName(ifacerefp->ifaceName()));
<<AstNode::prettyNameQ(ifacerefp->ifaceName()));
continue;
}
VSymEnt* ifaceSymp = getNodeSym(ifacerefp->ifaceViaCellp());
@ -428,9 +428,9 @@ public:
ok = true;
}
}
if (!ok) ifacerefp->v3error("Modport not found under interface '"
<<ifacerefp->prettyName(ifacerefp->ifaceName())
<<"': "<<ifacerefp->prettyName(ifacerefp->modportName()));
if (!ok) ifacerefp->v3error("Modport not found under interface "
<<ifacerefp->prettyNameQ(ifacerefp->ifaceName())
<<": "<<ifacerefp->prettyNameQ(ifacerefp->modportName()));
}
// Alias won't expand until interfaces and modport names are known; see notes at top
insertScopeAlias(SAMN_IFTOP, varSymp, ifOrPortSymp);
@ -709,7 +709,7 @@ class LinkDotFindVisitor : public AstNVisitor {
int oldModBeginNum = m_modBeginNum;
if (doit && nodep->user2()) {
nodep->v3error("Unsupported: Identically recursive module (module instantiates itself, without changing parameters): "
<<AstNode::prettyName(nodep->origName()));
<<AstNode::prettyNameQ(nodep->origName()));
} else if (doit) {
UINFO(4," Link Module: "<<nodep<<endl);
UASSERT_OBJ(!nodep->dead(), nodep, "Module in cell tree mislabeled as dead?");
@ -783,7 +783,7 @@ class LinkDotFindVisitor : public AstNVisitor {
aboveSymp = m_statep->findDotted(aboveSymp, scope, baddot, okSymp);
UASSERT_OBJ(aboveSymp, nodep,
"Can't find cell insertion point at '"
<<baddot<<"' in: "<<nodep->prettyName());
<<baddot<<"' in: "<<nodep->prettyNameQ());
}
{
m_scope = m_scope+"."+nodep->name();
@ -814,7 +814,7 @@ class LinkDotFindVisitor : public AstNVisitor {
aboveSymp = m_statep->findDotted(aboveSymp, dotted, baddot, okSymp);
UASSERT_OBJ(aboveSymp, nodep,
"Can't find cellinline insertion point at '"
<<baddot<<"' in: "<<nodep->prettyName());
<<baddot<<"' in: "<<nodep->prettyNameQ());
m_statep->insertInline(aboveSymp, m_modSymp, nodep, ident);
} else { // No __DOT__, just directly underneath
m_statep->insertInline(aboveSymp, m_modSymp, nodep, nodep->name());
@ -929,7 +929,7 @@ class LinkDotFindVisitor : public AstNVisitor {
} else if (!findvarp && foundp && m_curSymp->findIdFlat(nodep->name())) {
nodep->v3error("Unsupported in C: Variable has same name as "
<<LinkDotState::nodeTextType(foundp->nodep())
<<": "<<nodep->prettyName());
<<": "<<nodep->prettyNameQ());
} else if (findvarp != nodep) {
UINFO(4,"DupVar: "<<nodep<<" ;; "<<foundp->nodep()<<endl);
UINFO(4," found cur=se"<<cvtToHex(m_curSymp)
@ -944,7 +944,7 @@ class LinkDotFindVisitor : public AstNVisitor {
bool ansiWarn = ansiBad && !nansiBad;
if (ansiWarn) { if (didAnsiWarn++) ansiWarn = false; }
nodep->v3error("Duplicate declaration of signal: "
<<nodep->prettyName()<<endl
<<nodep->prettyNameQ()<<endl
<<(ansiWarn
? nodep->warnMore()+"... note: ANSI ports must have type declared with the I/O (IEEE 2017 23.2.2.2)\n"
: "")
@ -977,7 +977,7 @@ class LinkDotFindVisitor : public AstNVisitor {
&& !nodep->fileline()->warnIsOff(V3ErrorCode::VARHIDDEN)
&& !foundp->nodep()->fileline()->warnIsOff(V3ErrorCode::VARHIDDEN)) {
nodep->v3warn(VARHIDDEN, "Declaration of signal hides declaration in upper scope: "
<<nodep->prettyName()<<endl
<<nodep->prettyNameQ()<<endl
<<nodep->warnContextPrimary()<<endl
<<foundp->nodep()->warnOther()
<<"... Location of original declaration\n"
@ -1086,8 +1086,8 @@ class LinkDotFindVisitor : public AstNVisitor {
} else {
VSymEnt* impp = srcp->findIdFlat(nodep->name());
if (!impp) {
nodep->v3error("Import object not found: "
<<nodep->packagep()->prettyName()<<"::"<<nodep->prettyName());
nodep->v3error("Import object not found: '"
<<nodep->packagep()->prettyName()<<"::"<<nodep->prettyName()<<"'");
}
}
m_curSymp->importFromPackage(m_statep->symsp(), srcp, nodep->name());
@ -1100,8 +1100,8 @@ class LinkDotFindVisitor : public AstNVisitor {
if (nodep->name()!="*") {
VSymEnt* impp = srcp->findIdFlat(nodep->name());
if (!impp) {
nodep->v3error("Export object not found: "
<<nodep->packagep()->prettyName()<<"::"<<nodep->prettyName());
nodep->v3error("Export object not found: '"
<<nodep->packagep()->prettyName()<<"::"<<nodep->prettyName()<<"'");
}
}
m_curSymp->exportFromPackage(m_statep->symsp(), srcp, nodep->name());
@ -1236,12 +1236,12 @@ private:
AstVar* refp = foundp ? VN_CAST(foundp->nodep(), Var) : NULL;
if (!refp) {
nodep->v3error("Input/output/inout declaration not found for port: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
} else if (!refp->isIO() && !refp->isIfaceRef()) {
nodep->v3error("Pin is not an in/out/inout/interface: "<<nodep->prettyName());
nodep->v3error("Pin is not an in/out/inout/interface: "<<nodep->prettyNameQ());
} else {
if (refp->user4()) {
nodep->v3error("Duplicate declaration of port: "<<nodep->prettyName()<<endl
nodep->v3error("Duplicate declaration of port: "<<nodep->prettyNameQ()<<endl
<<nodep->warnContextPrimary()<<endl
<<refp->warnOther()<<"... Location of original declaration\n"
<<refp->warnContextSecondary());
@ -1341,14 +1341,14 @@ class LinkDotScopeVisitor : public AstNVisitor {
string baddot; VSymEnt* okSymp;
VSymEnt* cellSymp = m_statep->findDotted(m_modSymp, ifcellname, baddot, okSymp);
UASSERT_OBJ(cellSymp, nodep,
"No symbol for interface cell: "<<nodep->prettyName(ifcellname));
"No symbol for interface cell: "<<nodep->prettyNameQ(ifcellname));
UINFO(5, " Found interface cell: se"<<cvtToHex(cellSymp)
<<" "<<cellSymp->nodep()<<endl);
if (dtypep->modportName()!="") {
VSymEnt* mpSymp = m_statep->findDotted(m_modSymp, ifcellname, baddot, okSymp);
UASSERT_OBJ(mpSymp, nodep,
"No symbol for interface modport: "
<<nodep->prettyName(dtypep->modportName()));
<<nodep->prettyNameQ(dtypep->modportName()));
cellSymp = mpSymp;
UINFO(5, " Found modport cell: se"
<<cvtToHex(cellSymp)<<" "<<mpSymp->nodep()<<endl);
@ -1478,7 +1478,7 @@ class LinkDotIfaceVisitor : public AstNVisitor {
if (nodep->isExport()) nodep->v3error("Unsupported: modport export");
VSymEnt* symp = m_curSymp->findIdFallback(nodep->name());
if (!symp) {
nodep->v3error("Modport item not found: "<<nodep->prettyName());
nodep->v3error("Modport item not found: "<<nodep->prettyNameQ());
} else if (AstNodeFTask* ftaskp = VN_CAST(symp->nodep(), NodeFTask)) {
// Make symbol under modport that points at the _interface_'s var, not the modport.
nodep->ftaskp(ftaskp);
@ -1486,7 +1486,7 @@ class LinkDotIfaceVisitor : public AstNVisitor {
ftaskp, NULL/*package*/);
m_statep->insertScopeAlias(LinkDotState::SAMN_MODPORT, subSymp, symp);
} else {
nodep->v3error("Modport item is not a function/task: "<<nodep->prettyName());
nodep->v3error("Modport item is not a function/task: "<<nodep->prettyNameQ());
}
if (m_statep->forScopeCreation()) {
// Done with AstModportFTaskRef.
@ -1499,7 +1499,7 @@ class LinkDotIfaceVisitor : public AstNVisitor {
iterateChildren(nodep);
VSymEnt* symp = m_curSymp->findIdFallback(nodep->name());
if (!symp) {
nodep->v3error("Modport item not found: "<<nodep->prettyName());
nodep->v3error("Modport item not found: "<<nodep->prettyNameQ());
} else if (AstVar* varp = VN_CAST(symp->nodep(), Var)) {
// Make symbol under modport that points at the _interface_'s var via the modport.
// (Need modport still to test input/output markings)
@ -1510,7 +1510,7 @@ class LinkDotIfaceVisitor : public AstNVisitor {
nodep->varp(vscp->varp());
m_statep->insertSym(m_curSymp, nodep->name(), vscp, NULL/*package*/);
} else {
nodep->v3error("Modport item is not a variable: "<<nodep->prettyName());
nodep->v3error("Modport item is not a variable: "<<nodep->prettyNameQ());
}
if (m_statep->forScopeCreation()) {
// Done with AstModportVarRef.
@ -1612,10 +1612,10 @@ private:
if (!noWarn) {
if (nodep->fileline()->warnIsOff(V3ErrorCode::I_DEF_NETTYPE_WIRE)) {
nodep->v3error("Signal definition not found, and implicit disabled with `default_nettype: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
} else {
nodep->v3warn(IMPLICIT, "Signal definition not found, creating implicitly: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
}
}
AstVar* newp = new AstVar(nodep->fileline(), AstVarType::WIRE,
@ -1638,7 +1638,7 @@ private:
AstModportVarRef* snodep = VN_CAST(symp->nodep(), ModportVarRef);
AstVar* varp = snodep->varp();
if (lvalue && snodep->direction().isReadOnly()) {
nodep->v3error("Attempt to drive input-only modport: "<<nodep->prettyName());
nodep->v3error("Attempt to drive input-only modport: "<<nodep->prettyNameQ());
} // else other simulators don't warn about reading, and IEEE doesn't say illegal
return varp;
} else {
@ -1648,7 +1648,7 @@ private:
void taskFuncSwapCheck(AstNodeFTaskRef* nodep) {
if (nodep->taskp() && VN_IS(nodep->taskp(), Task)
&& VN_IS(nodep, FuncRef)) nodep->v3error("Illegal call of a task as a function: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
}
inline void checkNoDot(AstNode* nodep) {
if (VL_UNLIKELY(m_ds.m_dotPos != DP_NONE)) {
@ -1673,7 +1673,7 @@ private:
}
void markAndCheckPinDup(AstNode* nodep, AstNode* refp, const char* whatp) {
if (refp->user5p() && refp->user5p()!=nodep) {
nodep->v3error("Duplicate "<<whatp<<" connection: "<<nodep->prettyName()<<endl
nodep->v3error("Duplicate "<<whatp<<" connection: "<<nodep->prettyNameQ()<<endl
<<nodep->warnContextPrimary()<<endl
<<refp->user5p()->warnOther()
<<"... Location of original "<<whatp<<" connection\n"
@ -1762,12 +1762,12 @@ private:
nodep->unlinkFrBack()->deleteTree(); VL_DANGLING(nodep);
return;
}
nodep->v3error(ucfirst(whatp)<<" not found: "<<nodep->prettyName());
nodep->v3error(ucfirst(whatp)<<" not found: "<<nodep->prettyNameQ());
}
else if (AstVar* refp = VN_CAST(foundp->nodep(), Var)) {
if (!refp->isIO() && !refp->isParam() && !refp->isIfaceRef()) {
nodep->v3error(ucfirst(whatp)<<" is not an in/out/inout/param/interface: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
} else {
nodep->modVarp(refp);
markAndCheckPinDup(nodep, refp, whatp);
@ -1778,7 +1778,7 @@ private:
markAndCheckPinDup(nodep, refp, whatp);
}
else {
nodep->v3error(ucfirst(whatp)<<" not found: "<<nodep->prettyName());
nodep->v3error(ucfirst(whatp)<<" not found: "<<nodep->prettyNameQ());
}
}
// Early return() above when deleted
@ -1950,7 +1950,7 @@ private:
nodep->replaceWith(newp); pushDeletep(nodep); VL_DANGLING(nodep);
} else if (VN_IS(cellp->modp(), NotFoundModule)) {
cellp->v3error("Cannot find file containing interface: "
<<AstNode::prettyName(cellp->modp()->name()));
<<cellp->modp()->prettyNameQ());
}
}
}
@ -2005,11 +2005,11 @@ private:
|| !VN_CAST(m_ds.m_dotSymp->nodep(), Cell)->modp()
|| !VN_IS(VN_CAST(m_ds.m_dotSymp->nodep(), Cell)->modp(), Iface)) {
nodep->v3error("Modport not referenced as <interface>."
<<modportp->prettyName());
<<modportp->prettyNameQ());
} else if (!VN_CAST(m_ds.m_dotSymp->nodep(), Cell)->modp()
|| !VN_IS(VN_CAST(m_ds.m_dotSymp->nodep(), Cell)->modp(), Iface)) {
nodep->v3error("Modport not referenced from underneath an interface: "
<<modportp->prettyName());
<<modportp->prettyNameQ());
} else {
AstCell* cellp = VN_CAST(m_ds.m_dotSymp->nodep(), Cell);
UASSERT_OBJ(cellp, nodep, "Modport not referenced from a cell");
@ -2051,12 +2051,12 @@ private:
UINFO(7," ErrParseRef curSymp=se"<<cvtToHex(m_curSymp)
<<" ds="<<m_ds.ascii()<<endl);
nodep->v3error("Can't find definition of "<<expectWhat
<<": "<<nodep->prettyName());
<<": "<<nodep->prettyNameQ());
} else {
nodep->v3error("Can't find definition of '"
<<(baddot!="" ? baddot : nodep->prettyName())
<<"' in dotted "
<<expectWhat<<": "<<m_ds.m_dotText+"."+nodep->prettyName());
<<"' in dotted "<<expectWhat
<<": '"<<m_ds.m_dotText+"."+nodep->prettyName()<<"'");
okSymp->cellErrorScopes(nodep, AstNode::prettyName(m_ds.m_dotText));
}
m_ds.m_dotErr = true;
@ -2089,7 +2089,7 @@ private:
nodep->packagep(foundp->packagep()); // Generally set by parse, but might be an import
}
if (!nodep->varp()) {
nodep->v3error("Can't find definition of signal, again: "<<nodep->prettyName());
nodep->v3error("Can't find definition of signal, again: "<<nodep->prettyNameQ());
}
}
}
@ -2123,8 +2123,8 @@ private:
UINFO(7," Resolved "<<nodep<<endl); // Also prints varp
if (!nodep->varp()) {
nodep->v3error("Can't find definition of '"
<<baddot<<"' in dotted signal: "
<<nodep->dotted()+"."+nodep->prettyName());
<<baddot<<"' in dotted signal: '"
<<nodep->dotted()+"."+nodep->prettyName()<<"'");
okSymp->cellErrorScopes(nodep);
}
// V3Inst may have expanded arrays of interfaces to
@ -2144,8 +2144,8 @@ private:
AstVarScope* vscp = foundp ? VN_CAST(foundp->nodep(), VarScope) : NULL;
if (!vscp) {
nodep->v3error("Can't find varpin scope of '"<<baddot
<<"' in dotted signal: "
<<nodep->dotted()+"."+nodep->prettyName());
<<"' in dotted signal: '"
<<nodep->dotted()+"."+nodep->prettyName()<<"'");
okSymp->cellErrorScopes(nodep);
} else {
while (vscp->user2p()) { // If V3Inline aliased it, pick up the new signal
@ -2183,7 +2183,7 @@ private:
iterateChildren(nodep);
if (m_statep->forPrimary() && nodep->isIO() && !m_ftaskp && !nodep->user4()) {
nodep->v3error("Input/output/inout does not appear in port list: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
}
}
virtual void visit(AstNodeFTaskRef* nodep) {
@ -2275,11 +2275,11 @@ private:
<<" but expected a task/function");
} else if (nodep->dotted() == "") {
nodep->v3error("Can't find definition of task/function: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
} else {
nodep->v3error("Can't find definition of '"<<baddot
<<"' in dotted task/function: "
<<nodep->dotted()+"."+nodep->prettyName());
<<"' in dotted task/function: '"
<<nodep->dotted()+"."+nodep->prettyName()<<"'");
okSymp->cellErrorScopes(nodep);
}
}
@ -2394,7 +2394,7 @@ private:
nodep->packagep(foundp->packagep());
}
else {
nodep->v3error("Can't find typedef: "<<nodep->prettyName());
nodep->v3error("Can't find typedef: "<<nodep->prettyNameQ());
}
}
iterateChildren(nodep);
@ -2406,10 +2406,10 @@ private:
VSymEnt* foundp = m_curSymp->findIdFallback(nodep->name());
AstNodeFTask* taskp = foundp ? VN_CAST(foundp->nodep(), NodeFTask) : NULL;
if (!taskp) { nodep->v3error("Can't find definition of exported task/function: "
<<nodep->prettyName()); }
<<nodep->prettyNameQ()); }
else if (taskp->dpiExport()) {
nodep->v3error("Function was already DPI Exported, duplicate not allowed: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
} else {
taskp->dpiExport(true);
if (nodep->cname()!="") taskp->cname(nodep->cname());

2
src/V3LinkJump.cpp
View File

@ -230,7 +230,7 @@ private:
}
//if (debug()>=9) { UINFO(0,"\n"); beginp->dumpTree(cout, " labeli: "); }
if (!beginp) { nodep->v3error("disable isn't underneath a begin with name: "
<<nodep->prettyName()); }
<<nodep->prettyNameQ()); }
else {
// Jump to the end of the named begin
AstJumpLabel* labelp = findAddLabel(beginp, false);

2
src/V3LinkLValue.cpp
View File

@ -59,7 +59,7 @@ private:
if (nodep->lvalue() && !m_ftaskp
&& nodep->varp()->isReadOnly()) {
nodep->v3warn(ASSIGNIN, "Assigning to input/const variable: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
}
}
iterateChildren(nodep);

4
src/V3LinkLevel.cpp
View File

@ -61,7 +61,7 @@ void V3LinkLevel::modSortByLevel() {
if (topp) {
static int warnedOnce = 0;
nodep->v3warn(MULTITOP, "Multiple top level modules: "
<<nodep->prettyName()<<" and "<<topp->prettyName()
<<nodep->prettyNameQ()<<" and "<<topp->prettyNameQ()
<<(!warnedOnce++
? ("\n"+nodep->warnMore()
+"... Suggest see manual; fix the duplicates, or use --top-module to select top.")
@ -192,7 +192,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
}
if (varp->direction().isRefOrConstRef()) {
varp->v3error("Unsupported: ref/const ref as primary input/output: "
<<varp->prettyName());
<<varp->prettyNameQ());
}
if (varp->isIO() && v3Global.opt.systemC()) {
varp->sc(true);

5
src/V3LinkParse.cpp
View File

@ -177,7 +177,7 @@ private:
AstNodeDType* dtypep = VN_CAST(nodep->valuep(), NodeDType);
if (!dtypep) {
nodep->v3error("Parameter type's initial value isn't a type: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
nodep->unlinkFrBack();
} else {
dtypep->unlinkFrBack();
@ -209,7 +209,8 @@ private:
if (nodep->isParam() || (m_ftaskp && nodep->isNonOutput())) {
}
else if (!m_ftaskp && nodep->isNonOutput()) {
nodep->v3error("Unsupported: Default value on module input: "<<nodep->prettyName());
nodep->v3error("Unsupported: Default value on module input: "
<<nodep->prettyNameQ());
nodep->valuep()->unlinkFrBack()->deleteTree();
} // 2. Under modules, it's an initial value to be loaded at time 0 via an AstInitial
else if (m_valueModp) {

2
src/V3Name.cpp
View File

@ -62,7 +62,7 @@ private:
string rsvd = m_words.isKeyword(nodep->name());
if (rsvd != "") {
nodep->v3warn(SYMRSVDWORD, "Symbol matches "+rsvd
+": '"<<nodep->prettyName()<<"'");
+": "<<nodep->prettyNameQ());
string newname = string("__SYM__")+nodep->name();
nodep->name(newname);
}

10
src/V3Order.cpp
View File

@ -282,7 +282,7 @@ private:
if (varrefp->varp()->attrClocker() == AstVarAttrClocker::CLOCKER_YES) {
if (m_inClocked) {
varrefp->v3warn(CLKDATA, "Clock used as data (on rhs of assignment) in sequential block "
<<varrefp->prettyName()<<endl);
<<varrefp->prettyNameQ()<<endl);
} else {
m_hasClk = true;
UINFO(5, "node is already marked as clocker "<<varrefp<<endl);
@ -320,7 +320,7 @@ private:
if (m_inClocked) {
nodep->v3warn(CLKDATA,
"Clock used as data (on rhs of assignment) in sequential block "
<<nodep->prettyName());
<<nodep->prettyNameQ());
} else {
m_hasClk = true;
m_childClkWidth = nodep->width(); // Pass up
@ -833,10 +833,10 @@ private:
//
if (vertexp->isClock()) {
// Seems obvious; no warning yet
//nodep->v3warn(GENCLK,"Signal unoptimizable: Generated clock: "<<nodep->prettyName());
//nodep->v3warn(GENCLK, "Signal unoptimizable: Generated clock: "<<nodep->prettyNameQ());
} else if (nodep->varp()->isSigPublic()) {
nodep->v3warn(UNOPT, "Signal unoptimizable: Feedback to public clock or circular logic: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
if (!nodep->fileline()->warnIsOff(V3ErrorCode::UNOPT)) {
nodep->fileline()->modifyWarnOff(V3ErrorCode::UNOPT, true); // Complain just once
// Give the user an example.
@ -850,7 +850,7 @@ private:
// it was needed, that aren't any more
// First v3warn not inside warnIsOff so we can see the suppressions with --debug
nodep->v3warn(UNOPTFLAT, "Signal unoptimizable: Feedback to clock or circular logic: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
if (!nodep->fileline()->warnIsOff(V3ErrorCode::UNOPTFLAT)) {
nodep->fileline()->modifyWarnOff(V3ErrorCode::UNOPTFLAT, true); // Complain just once
// Give the user an example.

31
src/V3Param.cpp
View File

@ -285,7 +285,7 @@ private:
if (!nodep->valuep()) {
nodep->v3error("Parameter without initial value is never given value"
<<" (IEEE 1800-2017 6.20.1): "
<<nodep->prettyName());
<<nodep->prettyNameQ());
} else {
V3Const::constifyParamsEdit(nodep); // The variable, not just the var->init()
if (!VN_IS(nodep->valuep(), Const)) { // Complex init, like an array
@ -400,7 +400,7 @@ private:
nodep->name()+"__BRA__"+index+"__KET__");
} else {
nodep->v3error("Could not expand constant selection inside dotted reference: "
<<nodep->selp()->prettyName());
<<nodep->selp()->prettyNameQ());
return;
}
}
@ -582,7 +582,7 @@ void ParamVisitor::visitCell(AstCell* nodep) {
if (AstVar* modvarp = pinp->modVarp()) {
if (!modvarp->isGParam()) {
pinp->v3error("Attempted parameter setting of non-parameter: Param "
<<pinp->prettyName()<<" of "<<nodep->prettyName());
<<pinp->prettyNameQ()<<" of "<<nodep->prettyNameQ());
} else if (VN_IS(pinp->exprp(), InitArray)
&& VN_IS(modvarp->subDTypep(), UnpackArrayDType)) {
// Array assigned to array
@ -595,7 +595,7 @@ void ParamVisitor::visitCell(AstCell* nodep) {
if (!exprp) {
//if (debug()) pinp->dumpTree(cout, "error:");
pinp->v3error("Can't convert defparam value to constant: Param "
<<pinp->name()<<" of "<<nodep->prettyName());
<<pinp->prettyNameQ()<<" of "<<nodep->prettyNameQ());
pinp->exprp()->replaceWith(
new AstConst(pinp->fileline(),
AstConst::WidthedValue(), modvarp->width(), 0));
@ -620,10 +620,10 @@ void ParamVisitor::visitCell(AstCell* nodep) {
AstNodeDType* origp = modvarp->subDTypep();
if (!exprp) {
pinp->v3error("Parameter type pin value isn't a type: Param "
<<pinp->prettyName()<<" of "<<nodep->prettyName());
<<pinp->prettyNameQ()<<" of "<<nodep->prettyNameQ());
} else if (!origp) {
pinp->v3error("Parameter type variable isn't a type: Param "
<<modvarp->prettyName());
<<modvarp->prettyNameQ());
} else {
UINFO(9,"Parameter type assignment expr="<<exprp<<" to "<<origp<<endl);
if (origp && exprp->sameTree(origp)) {
@ -638,7 +638,7 @@ void ParamVisitor::visitCell(AstCell* nodep) {
}
} else {
pinp->v3error("Parameter not found in sub-module: Param "
<<pinp->prettyName()<<" of "<<nodep->prettyName());
<<pinp->prettyNameQ()<<" of "<<nodep->prettyNameQ());
}
}
IfaceRefRefs ifaceRefRefs;
@ -680,11 +680,11 @@ void ParamVisitor::visitCell(AstCell* nodep) {
UINFO(9," portIfaceRef "<<portIrefp<<endl);
if (!portIrefp) {
pinp->v3error("Interface port '"<<modvarp->prettyName()
<<"' is not an interface " << modvarp);
pinp->v3error("Interface port "<<modvarp->prettyNameQ()
<<" is not an interface " << modvarp);
} else if (!pinIrefp) {
pinp->v3error("Interface port '"<<modvarp->prettyName()
<<"' is not connected to interface/modport pin expression");
pinp->v3error("Interface port "<<modvarp->prettyNameQ()
<<" is not connected to interface/modport pin expression");
} else {
UINFO(9," pinIfaceRef "<<pinIrefp<<endl);
if (portIrefp->ifaceViaCellp() != pinIrefp->ifaceViaCellp()) {
@ -696,10 +696,11 @@ void ParamVisitor::visitCell(AstCell* nodep) {
if (portIrefp->ifacep() != pinIrefp->ifacep()
// Might be different only due to param cloning, so check names too
&& portIrefp->ifaceName() != pinIrefp->ifaceName()) {
pinp->v3error("Port '"<<pinp->prettyName()<<"' expects '"
<<AstNode::prettyName(portIrefp->ifaceName())
<<"' interface but pin connects '"
<<AstNode::prettyName(pinIrefp->ifaceName())<<"' interface");
pinp->v3error("Port "<<pinp->prettyNameQ()<<" expects "
<<AstNode::prettyNameQ(portIrefp->ifaceName())
<<" interface but pin connects "
<<AstNode::prettyNameQ(pinIrefp->ifaceName())
<<" interface");
}
}
}

2
src/V3SplitAs.cpp
View File

@ -179,7 +179,7 @@ private:
if (m_splitVscp && m_splitVscp == lastSplitVscp) {
// We did this last time! Something's stuck!
nodep->v3fatalSrc("Infinite loop in isolate_assignments removal for: "
<<m_splitVscp->prettyName())
<<m_splitVscp->prettyNameQ())
m_splitVscp = NULL;
}
lastSplitVscp = m_splitVscp;

34
src/V3Task.cpp
View File

@ -144,10 +144,10 @@ public:
void checkPurity(AstNodeFTask* nodep, TaskBaseVertex* vxp) {
if (!vxp->pure()) {
nodep->v3warn(IMPURE, "Unsupported: External variable referenced by non-inlined function/task: "
<<nodep->prettyName()<<endl
<<nodep->prettyNameQ()<<endl
<<nodep->warnContextPrimary()<<endl
<<vxp->impureNode()->warnOther()<<"... Location of the external reference: "
<<vxp->impureNode()->prettyName()<<endl
<<vxp->impureNode()->prettyNameQ()<<endl
<<vxp->impureNode()->warnContextSecondary());
}
// And, we need to check all tasks this task calls
@ -388,7 +388,7 @@ private:
pinp->v3error("Function/task "
+portp->direction().prettyName() // e.g. "output"
+" connected to constant instead of variable: "
+portp->prettyName());
+portp->prettyNameQ());
}
else if (portp->isInoutish()) {
// Correct lvalue; see comments below
@ -501,7 +501,7 @@ private:
pinp->v3error("Function/task "
+portp->direction().prettyName() // e.g. "output"
+" connected to constant instead of variable: "
+portp->prettyName());
+portp->prettyNameQ());
}
else if (portp->isInoutish()) {
// Correct lvalue; see comments below
@ -617,7 +617,7 @@ private:
bool logicvec = (portp->basicp()->keyword().isDpiLogicVal() && portp->width() > 1);
if (isRtn && (bitvec || logicvec)) {
portp->v3error("DPI functions cannot return > 32 bits or four-state;"
" use a two-state type or task instead: "<<portp->prettyName());
" use a two-state type or task instead: "<<portp->prettyNameQ());
// Code below works, but won't compile right, and IEEE illegal
}
string stmt;
@ -810,7 +810,7 @@ private:
void makeDpiImportProto(AstNodeFTask* nodep, AstVar* rtnvarp) {
if (nodep->cname() != AstNode::prettyName(nodep->cname())) {
nodep->v3error("DPI function has illegal characters in C identifier name: "
<<AstNode::prettyName(nodep->cname()));
<<AstNode::prettyNameQ(nodep->cname()));
}
AstCFunc* dpip = new AstCFunc(nodep->fileline(),
nodep->cname(),
@ -841,7 +841,7 @@ private:
}
else if (iter->second.second != dpiproto) {
nodep->v3error("Duplicate declaration of DPI function with different formal arguments: "
<<nodep->prettyName()<<endl
<<nodep->prettyNameQ()<<endl
<<nodep->warnContextPrimary()<<endl
<<nodep->warnMore()<<"... New prototype: "<<dpiproto<<endl
<<iter->second.first->warnOther()<<"... Original prototype: "
@ -1244,7 +1244,7 @@ private:
if (nodep->dpiExport()) modes++;
if (nodep->taskPublic()) modes++;
if (modes > 1) nodep->v3error("Cannot mix DPI import, DPI export and/or public on same function: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
if (nodep->dpiImport() || nodep->dpiExport()
|| nodep->taskPublic() || m_statep->ftaskNoInline(nodep)) {
@ -1382,14 +1382,14 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp)
// By name
NameToIndex::iterator it = nameToIndex.find(argp->name());
if (it == nameToIndex.end()) {
pinp->v3error("No such argument '"<<argp->prettyName()
<<"' in function call to "<<nodep->taskp()->prettyTypeName());
pinp->v3error("No such argument "<<argp->prettyNameQ()
<<" in function call to "<<nodep->taskp()->prettyTypeName());
// We'll just delete it; seems less error prone than making a false argument
pinp->unlinkFrBack()->deleteTree(); VL_DANGLING(pinp);
} else {
if (tconnects[it->second].second) {
pinp->v3error("Duplicate argument '"<<argp->prettyName()
<<"' in function call to "<<nodep->taskp()->prettyTypeName());
pinp->v3error("Duplicate argument "<<argp->prettyNameQ()
<<" in function call to "<<nodep->taskp()->prettyTypeName());
}
argp->name(""); // Can forget name as will add back in pin order
tconnects[it->second].second = argp;
@ -1420,8 +1420,8 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp)
if (!tconnects[i].second || !tconnects[i].second->exprp()) {
AstNode* newvaluep = NULL;
if (!portp->valuep()) {
nodep->v3error("Missing argument on non-defaulted argument '"<<portp->prettyName()
<<"' in function call to "<<nodep->taskp()->prettyTypeName());
nodep->v3error("Missing argument on non-defaulted argument "<<portp->prettyNameQ()
<<" in function call to "<<nodep->taskp()->prettyTypeName());
newvaluep = new AstConst(nodep->fileline(), AstConst::Unsized32(), 0);
} else if (!VN_IS(portp->valuep(), Const)) {
// The default value for this port might be a constant
@ -1432,9 +1432,9 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp)
// Problem otherwise is we might have a varref, task
// call, or something else that only makes sense in the
// domain of the function, not the callee.
nodep->v3error("Unsupported: Non-constant default value in missing argument '"
<<portp->prettyName()
<<"' in function call to "<<nodep->taskp()->prettyTypeName());
nodep->v3error("Unsupported: Non-constant default value in missing argument "
<<portp->prettyNameQ()
<<" in function call to "<<nodep->taskp()->prettyTypeName());
newvaluep = new AstConst(nodep->fileline(), AstConst::Unsized32(), 0);
}
else {

4
src/V3Tristate.cpp
View File

@ -390,7 +390,7 @@ class TristateVisitor : public TristateBaseVisitor {
invarp);
UINFO(9," newenv "<<newp<<endl);
if (!m_modp) { invarp->v3error("Unsupported: Creating tristate signal not underneath a module: "
<<invarp->prettyName()); }
<<invarp->prettyNameQ()); }
else m_modp->addStmtp(newp);
invarp->user1p(newp); // find envar given invarp
}
@ -406,7 +406,7 @@ class TristateVisitor : public TristateBaseVisitor {
invarp);
UINFO(9," newout "<<newp<<endl);
if (!m_modp) { invarp->v3error("Unsupported: Creating tristate signal not underneath a module: "
<<invarp->prettyName()); }
<<invarp->prettyNameQ()); }
else m_modp->addStmtp(newp);
invarp->user4p(newp); // find outvar given invarp
}

19
src/V3Undriven.cpp
View File

@ -183,33 +183,34 @@ public:
// UNDRIVEN is considered more serious - as is more likely a bug,
// thus undriven+unused bits get UNUSED warnings, as they're not as buggy.
if (!unusedMatch(nodep)) {
nodep->v3warn(UNUSED, "Signal is not driven, nor used: "<<nodep->prettyName());
nodep->v3warn(UNUSED, "Signal is not driven, nor used: "
<<nodep->prettyNameQ());
nodep->fileline()->modifyWarnOff(V3ErrorCode::UNUSED, true); // Warn only once
}
} else if (allD && !anyU) {
if (!unusedMatch(nodep)) {
nodep->v3warn(UNUSED, "Signal is not used: "<<nodep->prettyName());
nodep->v3warn(UNUSED, "Signal is not used: "<<nodep->prettyNameQ());
nodep->fileline()->modifyWarnOff(V3ErrorCode::UNUSED, true); // Warn only once
}
} else if (!anyD && allU) {
nodep->v3warn(UNDRIVEN, "Signal is not driven: "<<nodep->prettyName());
nodep->v3warn(UNDRIVEN, "Signal is not driven: "<<nodep->prettyNameQ());
nodep->fileline()->modifyWarnOff(V3ErrorCode::UNDRIVEN, true); // Warn only once
} else {
// Bits have different dispositions
bool setU=false; bool setD=false;
if (anynotDU && !unusedMatch(nodep)) {
nodep->v3warn(UNUSED, "Bits of signal are not driven, nor used: "
<<nodep->prettyName()
<<nodep->prettyNameQ()
<<bitNames(BN_BOTH));
setU = true;
}
if (anyDnotU && !unusedMatch(nodep)) {
nodep->v3warn(UNUSED, "Bits of signal are not used: "<<nodep->prettyName()
nodep->v3warn(UNUSED, "Bits of signal are not used: "<<nodep->prettyNameQ()
<<bitNames(BN_UNUSED));
setU = true;
}
if (anyUnotD) {
nodep->v3warn(UNDRIVEN, "Bits of signal are not driven: "<<nodep->prettyName()
nodep->v3warn(UNDRIVEN, "Bits of signal are not driven: "<<nodep->prettyNameQ()
<<bitNames(BN_UNDRIVEN));
setD = true;
}
@ -267,7 +268,7 @@ private:
&& !VN_IS(nodep, VarXRef) // Xrefs might point at two different instances
&& !varp->fileline()->warnIsOff(V3ErrorCode::ALWCOMBORDER)) { // Warn only once per variable
nodep->v3warn(ALWCOMBORDER, "Always_comb variable driven after use: "
<<nodep->prettyName());
<<nodep->prettyNameQ());
varp->fileline()->modifyWarnOff(V3ErrorCode::ALWCOMBORDER, true); // Complain just once for any usage
}
}
@ -333,13 +334,13 @@ private:
if (m_inProcAssign && !nodep->varp()->varType().isProcAssignable()) {
nodep->v3warn(PROCASSWIRE, "Procedural assignment to wire, perhaps intended var"
" (IEEE 2017 6.5): "
+nodep->prettyName());
+nodep->prettyNameQ());
}
if (m_inContAssign && !nodep->varp()->varType().isContAssignable()
&& !nodep->fileline()->language().systemVerilog()) {
nodep->v3warn(CONTASSREG, "Continuous assignment to reg, perhaps intended wire"
" (IEEE 2005 6.1; Verilog only, legal in SV): "
+nodep->prettyName());
+nodep->prettyNameQ());
}
}
for (int usr=1; usr<(m_alwaysCombp?3:2); ++usr) {

2
src/V3Unroll.cpp
View File

@ -122,7 +122,7 @@ private:
m_forVarp = VN_CAST(initAssp->lhsp(), VarRef)->varp();
m_forVscp = VN_CAST(initAssp->lhsp(), VarRef)->varScopep();
if (VN_IS(nodep, GenFor) && !m_forVarp->isGenVar()) {
nodep->v3error("Non-genvar used in generate for: "<<m_forVarp->prettyName()<<endl);
nodep->v3error("Non-genvar used in generate for: "<<m_forVarp->prettyNameQ()<<endl);
}
if (m_generate) V3Const::constifyParamsEdit(initAssp->rhsp()); // rhsp may change

26
src/V3Width.cpp
View File

@ -1220,7 +1220,7 @@ private:
if (nodep->didWidth()) return;
if (nodep->doingWidth()) { // Early exit if have circular parameter definition
UASSERT_OBJ(nodep->valuep(), nodep, "circular, but without value");
nodep->v3error("Variable's initial value is circular: "<<nodep->prettyName());
nodep->v3error("Variable's initial value is circular: "<<nodep->prettyNameQ());
pushDeletep(nodep->valuep()->unlinkFrBack());
nodep->valuep(new AstConst(nodep->fileline(), AstConst::LogicTrue()));
nodep->dtypeFrom(nodep->valuep());
@ -1318,7 +1318,7 @@ private:
if (!nodep->varp()) {
if (m_paramsOnly && VN_IS(nodep, VarXRef)) {
checkConstantOrReplace(nodep, "Parameter-resolved constants must not use dotted references: "
+nodep->prettyName()); VL_DANGLING(nodep);
+nodep->prettyNameQ()); VL_DANGLING(nodep);
return;
} else {
nodep->v3fatalSrc("Unlinked varref");
@ -1336,13 +1336,13 @@ private:
}
//if (debug()>=9) nodep->dumpTree(cout, " VRout ");
if (nodep->lvalue() && nodep->varp()->direction() == VDirection::CONSTREF) {
nodep->v3error("Assigning to const ref variable: "<<nodep->prettyName());
nodep->v3error("Assigning to const ref variable: "<<nodep->prettyNameQ());
}
else if (nodep->lvalue() && nodep->varp()->isConst()
&& !m_paramsOnly
&& !m_initialp) { // Too loose, but need to allow our generated first assignment
// // Move this to a property of the AstInitial block
nodep->v3error("Assigning to const variable: "<<nodep->prettyName());
nodep->v3error("Assigning to const variable: "<<nodep->prettyNameQ());
}
nodep->didWidth(true);
}
@ -1387,7 +1387,7 @@ private:
// Look for duplicates
if (inits.find(num) != inits.end()) { // IEEE says illegal
AstNode* otherp = inits.find(num)->second;
itemp->v3error("Overlapping enumeration value: "<<itemp->prettyName()<<endl
itemp->v3error("Overlapping enumeration value: "<<itemp->prettyNameQ()<<endl
<<itemp->warnContextPrimary()<<endl
<<otherp->warnOther()
<<"... Location of original declaration\n"
@ -1553,7 +1553,7 @@ private:
// No need to width-resolve the class, as it was done when we did the child
memberp = adtypep->findMember(nodep->name());
if (!memberp) {
nodep->v3error("Member '"<<nodep->prettyName()<<"' not found in structure");
nodep->v3error("Member "<<nodep->prettyNameQ()<<" not found in structure");
}
}
else if (VN_IS(fromDtp, EnumDType)) {
@ -1690,7 +1690,7 @@ private:
0, selwidth));
nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep);
} else {
nodep->v3error("Unknown built-in enum method '"<<nodep->prettyName()<<"'");
nodep->v3error("Unknown built-in enum method "<<nodep->prettyNameQ());
}
}
else if (AstUnpackArrayDType* arrayType = VN_CAST(fromDtp, UnpackArrayDType)) {
@ -1729,7 +1729,7 @@ private:
nodep->deleteTree(); VL_DANGLING(nodep);
}
else {
nodep->v3error("Unknown built-in array method '"<<nodep->prettyName()<<"'");
nodep->v3error("Unknown built-in array method "<<nodep->prettyNameQ());
}
}
else if (basicp && basicp->isString()) {
@ -1751,7 +1751,7 @@ private:
} else if (nodep->name() == "realtoa") {
replaceWithSFormat(nodep, "%g"); VL_DANGLING(nodep);
} else {
nodep->v3error("Unsupported: built-in string method '"<<nodep->prettyName()<<"'");
nodep->v3error("Unsupported: built-in string method "<<nodep->prettyNameQ());
}
}
else {
@ -2450,7 +2450,7 @@ private:
userIterateAndNext(nodep->exprp(), WidthVP(subDTypep, FINAL).p());
} else {
if (nodep->modVarp()->direction() == VDirection::REF) {
nodep->v3error("Ref connection '"<<nodep->modVarp()->prettyName()<<"'"
nodep->v3error("Ref connection "<<nodep->modVarp()->prettyNameQ()
<<" requires matching types;"
<<" ref requires "<<pinDTypep->prettyTypeName()
<<" but connection is "
@ -2702,13 +2702,13 @@ private:
if (portp->direction() == VDirection::REF
&& !similarDTypeRecurse(portp->dtypep(), pinp->dtypep())) {
pinp->v3error("Ref argument requires matching types;"
<<" port '"<<portp->prettyName()<<"'"
<<" port "<<portp->prettyNameQ()
<<" requires "<<portp->prettyTypeName()
<<" but connection is "<<pinp->prettyTypeName()<<".");
} else if (portp->isWritable()
&& pinp->width() != portp->width()) {
pinp->v3error("Unsupported: Function output argument '"
<<portp->prettyName()<<"'"
pinp->v3error("Unsupported: Function output argument "
<<portp->prettyNameQ()
<<" requires "<<portp->width()
<<" bits, but connection's "<<pinp->prettyTypeName()
<<" generates "<<pinp->width()<<" bits.");

2
test_regress/t/t_assert_dup_bad.out
View File

@ -1,3 +1,3 @@
%Error: t/t_assert_dup_bad.v:16: Duplicate declaration of block: covlabel
%Error: t/t_assert_dup_bad.v:16: Duplicate declaration of block: 'covlabel'
t/t_assert_dup_bad.v:14: ... Location of original declaration
%Error: Exiting due to

6
test_regress/t/t_cdc_async_bad.out
View File

@ -1,6 +1,6 @@
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:27: Logic in path that feeds async reset, via signal: t.rst2_bad_n
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:27: Logic in path that feeds async reset, via signal: 't.rst2_bad_n'
... Use "/* verilator lint_off CDCRSTLOGIC */" and lint_on around source to disable this message.
%Warning-CDCRSTLOGIC: See details in obj_vlt/t_cdc_async_bad/Vt_cdc_async_bad__cdc.txt
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:52: Logic in path that feeds async reset, via signal: t.rst6a_bad_n
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:53: Logic in path that feeds async reset, via signal: t.rst6b_bad_n
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:52: Logic in path that feeds async reset, via signal: 't.rst6a_bad_n'
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:53: Logic in path that feeds async reset, via signal: 't.rst6b_bad_n'
%Error: Exiting due to

2
test_regress/t/t_clk_scope_bad.out
View File

@ -1,3 +1,3 @@
%Warning-CLKDATA: t/t_clk_scope_bad.v:35: Clock used as data (on rhs of assignment) in sequential block clk
%Warning-CLKDATA: t/t_clk_scope_bad.v:35: Clock used as data (on rhs of assignment) in sequential block 'clk'
... Use "/* verilator lint_off CLKDATA */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_dpi_2exp_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_dpi_2exp_bad.v:11: Function was already DPI Exported, duplicate not allowed: dpix_twice
%Error: t/t_dpi_2exp_bad.v:11: Function was already DPI Exported, duplicate not allowed: 'dpix_twice'
%Error: Exiting due to

2
test_regress/t/t_dpi_dup_bad.out
View File

@ -1,4 +1,4 @@
%Error: t/t_dpi_dup_bad.v:12: Duplicate declaration of DPI function with different formal arguments: t.oth_f_int2
%Error: t/t_dpi_dup_bad.v:12: Duplicate declaration of DPI function with different formal arguments: 't.oth_f_int2'
: ... New prototype: pure int dpii_fa_bit (int, int)
t/t_dpi_dup_bad.v:11: ... Original prototype: int dpii_fa_bit (int)
%Error: Exiting due to

2
test_regress/t/t_dpi_exp_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_dpi_exp_bad.v:11: DPI functions cannot return > 32 bits or four-state; use a two-state type or task instead: dpix_f_bit48__Vfuncrtn
%Error: t/t_dpi_exp_bad.v:11: DPI functions cannot return > 32 bits or four-state; use a two-state type or task instead: 'dpix_f_bit48__Vfuncrtn'
%Error: Exiting due to

2
test_regress/t/t_dpi_name_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_dpi_name_bad.v:11: DPI function has illegal characters in C identifier name: badly.named
%Error: t/t_dpi_name_bad.v:11: DPI function has illegal characters in C identifier name: 'badly.named'
%Error: Exiting due to

2
test_regress/t/t_enum_overlap_bad.out
View File

@ -1,3 +1,3 @@
%Error: t/t_enum_overlap_bad.v:11: Overlapping enumeration value: e1b
%Error: t/t_enum_overlap_bad.v:11: Overlapping enumeration value: 'e1b'
t/t_enum_overlap_bad.v:9: ... Location of original declaration
%Error: Exiting due to

4
test_regress/t/t_flag_errorlimit_bad.out
View File

@ -1,5 +1,5 @@
%Error: t/t_flag_errorlimit_bad.v:9: Duplicate declaration of signal: u1
%Error: t/t_flag_errorlimit_bad.v:9: Duplicate declaration of signal: 'u1'
t/t_flag_errorlimit_bad.v:8: ... Location of original declaration
%Error: t/t_flag_errorlimit_bad.v:10: Duplicate declaration of signal: u1
%Error: t/t_flag_errorlimit_bad.v:10: Duplicate declaration of signal: 'u1'
t/t_flag_errorlimit_bad.v:8: ... Location of original declaration
%Error: Exiting due to

4
test_regress/t/t_flag_topmodule_bad.out
View File

@ -1,5 +1,5 @@
%Warning-MULTITOP: t/t_flag_topmodule.v:14: Multiple top level modules: a2 and a
%Warning-MULTITOP: t/t_flag_topmodule.v:14: Multiple top level modules: 'a2' and 'a'
: ... Suggest see manual; fix the duplicates, or use --top-module to select top.
... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.
%Warning-MULTITOP: t/t_flag_topmodule.v:21: Multiple top level modules: b and a2
%Warning-MULTITOP: t/t_flag_topmodule.v:21: Multiple top level modules: 'b' and 'a2'
%Error: Exiting due to

2
test_regress/t/t_func_task_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_func_task_bad.v:9: Illegal call of a task as a function: task_as_func
%Error: t/t_func_task_bad.v:9: Illegal call of a task as a function: 'task_as_func'
%Error: Exiting due to

2
test_regress/t/t_func_tie_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_func_tie_bad.v:10: Function/task output connected to constant instead of variable: b
%Error: t/t_func_tie_bad.v:10: Function/task output connected to constant instead of variable: 'b'
%Error: Exiting due to

2
test_regress/t/t_gen_var_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_gen_var_bad.v:9: Non-genvar used in generate for: i
%Error: t/t_gen_var_bad.v:9: Non-genvar used in generate for: 'i'
%Error: Exiting due to

6
test_regress/t/t_inst_missing_bad.out
View File

@ -1,5 +1,5 @@
%Warning-PINNOCONNECT: t/t_inst_missing_bad.v:8: Cell pin is not connected: __pinNumber2
%Warning-PINNOCONNECT: t/t_inst_missing_bad.v:8: Cell pin is not connected: '__pinNumber2'
... Use "/* verilator lint_off PINNOCONNECT */" and lint_on around source to disable this message.
%Warning-PINCONNECTEMPTY: t/t_inst_missing_bad.v:8: Cell pin connected by name with empty reference: nc
%Warning-PINMISSING: t/t_inst_missing_bad.v:8: Cell has missing pin: missing
%Warning-PINCONNECTEMPTY: t/t_inst_missing_bad.v:8: Cell pin connected by name with empty reference: 'nc'
%Warning-PINMISSING: t/t_inst_missing_bad.v:8: Cell has missing pin: 'missing'
%Error: Exiting due to

2
test_regress/t/t_inst_recurse2_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_inst_recurse2_bad.v:17: Unsupported: Identically recursive module (module instantiates itself, without changing parameters): looped
%Error: t/t_inst_recurse2_bad.v:17: Unsupported: Identically recursive module (module instantiates itself, without changing parameters): 'looped'
%Error: Exiting due to

2
test_regress/t/t_inst_recurse_bad.out
View File

@ -1,3 +1,3 @@
%Error: t/t_inst_recurse_bad.v:17: Unsupported: Recursive multiple modules (module instantiates something leading back to itself): looped
%Error: t/t_inst_recurse_bad.v:17: Unsupported: Recursive multiple modules (module instantiates something leading back to itself): 'looped'
... note: self-recursion (module instantiating itself directly) is supported.
%Error: Exiting due to

4
test_regress/t/t_interface_array_bad.out
View File

@ -1,3 +1,3 @@
%Error: t/t_interface_array_bad.v:22: Expecting expression to be constant, but variable isn't const: bar
%Error: t/t_interface_array_bad.v:22: Could not expand constant selection inside dotted reference: bar
%Error: t/t_interface_array_bad.v:22: Expecting expression to be constant, but variable isn't const: 'bar'
%Error: t/t_interface_array_bad.v:22: Could not expand constant selection inside dotted reference: 'bar'
%Error: Exiting due to

2
test_regress/t/t_interface_mismodport_bad.out
View File

@ -1,3 +1,3 @@
%Error: t/t_interface_mismodport_bad.v:35: Can't find definition of 'bad' in dotted signal: isub.bad
%Error: t/t_interface_mismodport_bad.v:35: Can't find definition of 'bad' in dotted signal: 'isub.bad'
... Known scopes under 'bad': <no cells found>
%Error: Exiting due to

4
test_regress/t/t_interface_missing_bad.out
View File

@ -1,4 +1,4 @@
%Error: t/t_interface_missing_bad.v:13: Cannot find file containing interface: foo_intf
%Error: t/t_interface_missing_bad.v:19: Cannot find file containing interface: foo_intf
%Error: t/t_interface_missing_bad.v:13: Cannot find file containing interface: 'foo_intf'
%Error: t/t_interface_missing_bad.v:19: Cannot find file containing interface: 'foo_intf'
%Error: t/t_interface_missing_bad.v:24: Found definition of 'the_foo' as a CELL but expected a variable
%Error: Exiting due to

2
test_regress/t/t_interface_modport_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_interface_modport_bad.v:22: Modport not found under interface 'ifc': oop_modport
%Error: t/t_interface_modport_bad.v:22: Modport not found under interface 'ifc': 'oop_modport'
%Error: Exiting due to

2
test_regress/t/t_interface_param_another_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_interface_param_another_bad.v:8: Parameter-resolved constants must not use dotted references: dummy
%Error: t/t_interface_param_another_bad.v:8: Parameter-resolved constants must not use dotted references: 'dummy'
%Error: Exiting due to

2
test_regress/t/t_interface_top_bad.out
View File

@ -1,3 +1,3 @@
%Error: t/t_interface_top_bad.v:16: Unsupported: Interfaced port on top level module
%Error: t/t_interface_top_bad.v:16: Parent cell's interface is not found: ifc
%Error: t/t_interface_top_bad.v:16: Parent cell's interface is not found: 'ifc'
%Error: Exiting due to

4
test_regress/t/t_interface_typo_bad.out
View File

@ -1,4 +1,4 @@
%Error: t/t_interface_typo_bad.v:13: Parent cell's interface is not found: foo_intf
%Error: t/t_interface_typo_bad.v:21: Cannot find file containing interface: fo_intf
%Error: t/t_interface_typo_bad.v:13: Parent cell's interface is not found: 'foo_intf'
%Error: t/t_interface_typo_bad.v:21: Cannot find file containing interface: 'fo_intf'
%Error: t/t_interface_typo_bad.v:26: Found definition of 'the_foo' as a CELL but expected a variable
%Error: Exiting due to

8
test_regress/t/t_lint_always_comb_bad.out
View File

@ -1,6 +1,6 @@
%Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:28: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): temp1
%Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:30: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): temp1
%Warning-ALWCOMBORDER: t/t_lint_always_comb_bad.v:31: Always_comb variable driven after use: mid
%Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:28: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): 'temp1'
%Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:30: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): 'temp1'
%Warning-ALWCOMBORDER: t/t_lint_always_comb_bad.v:31: Always_comb variable driven after use: 'mid'
... Use "/* verilator lint_off ALWCOMBORDER */" and lint_on around source to disable this message.
%Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:45: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): temp1_d1r
%Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:45: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): 'temp1_d1r'
%Error: Exiting due to

2
test_regress/t/t_lint_declfilename_bad.out
View File

@ -1,3 +1,3 @@
%Warning-DECLFILENAME: t/t_lint_declfilename.v:6: Filename 't_lint_declfilename' does not match MODULE name: t
%Warning-DECLFILENAME: t/t_lint_declfilename.v:6: Filename 't_lint_declfilename' does not match MODULE name: 't'
... Use "/* verilator lint_off DECLFILENAME */" and lint_on around source to disable this message.
%Error: Exiting due to

8
test_regress/t/t_lint_implicit_bad.out
View File

@ -1,6 +1,6 @@
%Warning-IMPLICIT: t/t_lint_implicit.v:10: Signal definition not found, creating implicitly: b
%Warning-IMPLICIT: t/t_lint_implicit.v:10: Signal definition not found, creating implicitly: 'b'
... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.
%Warning-IMPLICIT: t/t_lint_implicit.v:12: Signal definition not found, creating implicitly: nt0
%Warning-IMPLICIT: t/t_lint_implicit.v:15: Signal definition not found, creating implicitly: dummy1
%Warning-IMPLICIT: t/t_lint_implicit.v:15: Signal definition not found, creating implicitly: dummy2
%Warning-IMPLICIT: t/t_lint_implicit.v:12: Signal definition not found, creating implicitly: 'nt0'
%Warning-IMPLICIT: t/t_lint_implicit.v:15: Signal definition not found, creating implicitly: 'dummy1'
%Warning-IMPLICIT: t/t_lint_implicit.v:15: Signal definition not found, creating implicitly: 'dummy2'
%Error: Exiting due to

4
test_regress/t/t_lint_implicit_def_bad.out
View File

@ -1,4 +1,4 @@
%Warning-IMPLICIT: t/t_lint_implicit_def_bad.v:10: Signal definition not found, creating implicitly: imp_warn
%Warning-IMPLICIT: t/t_lint_implicit_def_bad.v:10: Signal definition not found, creating implicitly: 'imp_warn'
... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.
%Error: t/t_lint_implicit_def_bad.v:15: Signal definition not found, and implicit disabled with `default_nettype: imp_err
%Error: t/t_lint_implicit_def_bad.v:15: Signal definition not found, and implicit disabled with `default_nettype: 'imp_err'
%Error: Exiting due to

2
test_regress/t/t_lint_import_name_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_lint_import_name_bad.v:10: Import object not found: defs::sigs
%Error: t/t_lint_import_name_bad.v:10: Import object not found: 'defs::sigs'
%Error: Exiting due to

2
test_regress/t/t_lint_input_eq_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_lint_input_eq_bad.v:9: Unsupported: Default value on module input: i2
%Error: t/t_lint_input_eq_bad.v:9: Unsupported: Default value on module input: 'i2'
%Error: Exiting due to

2
test_regress/t/t_lint_modport_dir_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_lint_modport_dir_bad.v:25: Attempt to drive input-only modport: signal
%Error: t/t_lint_modport_dir_bad.v:25: Attempt to drive input-only modport: 'signal'
%Error: Exiting due to

4
test_regress/t/t_lint_multidriven_bad.out
View File

@ -1,8 +1,8 @@
%Warning-MULTIDRIVEN: t/t_lint_multidriven_bad.v:20: Signal has multiple driving blocks with different clocking: t.mem
%Warning-MULTIDRIVEN: t/t_lint_multidriven_bad.v:20: Signal has multiple driving blocks with different clocking: 't.mem'
t/t_lint_multidriven_bad.v:26: ... Location of first driving block
t/t_lint_multidriven_bad.v:23: ... Location of other driving block
... Use "/* verilator lint_off MULTIDRIVEN */" and lint_on around source to disable this message.
%Warning-MULTIDRIVEN: t/t_lint_multidriven_bad.v:18: Signal has multiple driving blocks with different clocking: out2
%Warning-MULTIDRIVEN: t/t_lint_multidriven_bad.v:18: Signal has multiple driving blocks with different clocking: 'out2'
t/t_lint_multidriven_bad.v:34: ... Location of first driving block
t/t_lint_multidriven_bad.v:31: ... Location of other driving block
%Error: Exiting due to

4
test_regress/t/t_lint_once_bad.out
View File

@ -1,4 +1,4 @@
%Warning-UNUSED: t/t_lint_once_bad.v:18: Signal is not driven, nor used: unus1
%Warning-UNUSED: t/t_lint_once_bad.v:18: Signal is not driven, nor used: 'unus1'
... Use "/* verilator lint_off UNUSED */" and lint_on around source to disable this message.
%Warning-UNUSED: t/t_lint_once_bad.v:18: Signal is not driven, nor used: unus2
%Warning-UNUSED: t/t_lint_once_bad.v:18: Signal is not driven, nor used: 'unus2'
%Error: Exiting due to

6
test_regress/t/t_lint_pindup_bad.out
View File

@ -1,6 +1,6 @@
%Error: t/t_lint_pindup_bad.v:17: Duplicate pin connection: i
%Error: t/t_lint_pindup_bad.v:17: Duplicate pin connection: 'i'
t/t_lint_pindup_bad.v:16: ... Location of original pin connection
%Error: t/t_lint_pindup_bad.v:18: Pin not found: __pinNumber4
%Error: t/t_lint_pindup_bad.v:14: Duplicate parameter pin connection: P
%Error: t/t_lint_pindup_bad.v:18: Pin not found: '__pinNumber4'
%Error: t/t_lint_pindup_bad.v:14: Duplicate parameter pin connection: 'P'
t/t_lint_pindup_bad.v:14: ... Location of original parameter pin connection
%Error: Exiting due to

2
test_regress/t/t_lint_syncasyncnet_bad.out
View File

@ -1,4 +1,4 @@
%Warning-SYNCASYNCNET: t/t_lint_syncasyncnet_bad.v:15: Signal flopped as both synchronous and async: rst_both_l
%Warning-SYNCASYNCNET: t/t_lint_syncasyncnet_bad.v:15: Signal flopped as both synchronous and async: 'rst_both_l'
t/t_lint_syncasyncnet_bad.v:90: ... Location of async usage
t/t_lint_syncasyncnet_bad.v:58: ... Location of sync usage
... Use "/* verilator lint_off SYNCASYNCNET */" and lint_on around source to disable this message.

12
test_regress/t/t_lint_unused_bad.out
View File

@ -1,8 +1,8 @@
%Warning-UNUSED: t/t_lint_unused_bad.v:16: Bits of signal are not used: assunu1[5:1]
%Warning-UNUSED: t/t_lint_unused_bad.v:16: Bits of signal are not used: 'assunu1'[5:1]
... Use "/* verilator lint_off UNUSED */" and lint_on around source to disable this message.
%Warning-UNDRIVEN: t/t_lint_unused_bad.v:20: Bits of signal are not driven: udrb2[14:13,11]
%Warning-UNUSED: t/t_lint_unused_bad.v:25: Signal is not driven, nor used: unu3
%Warning-UNUSED: t/t_lint_unused_bad.v:27: Bits of signal are not driven, nor used: mixed[3]
%Warning-UNUSED: t/t_lint_unused_bad.v:27: Bits of signal are not used: mixed[2]
%Warning-UNDRIVEN: t/t_lint_unused_bad.v:27: Bits of signal are not driven: mixed[1]
%Warning-UNDRIVEN: t/t_lint_unused_bad.v:20: Bits of signal are not driven: 'udrb2'[14:13,11]
%Warning-UNUSED: t/t_lint_unused_bad.v:25: Signal is not driven, nor used: 'unu3'
%Warning-UNUSED: t/t_lint_unused_bad.v:27: Bits of signal are not driven, nor used: 'mixed'[3]
%Warning-UNUSED: t/t_lint_unused_bad.v:27: Bits of signal are not used: 'mixed'[2]
%Warning-UNDRIVEN: t/t_lint_unused_bad.v:27: Bits of signal are not driven: 'mixed'[1]
%Error: Exiting due to

4
test_regress/t/t_lint_unused_iface_bad.out
View File

@ -1,4 +1,4 @@
%Warning-UNDRIVEN: t/t_lint_unused_iface_bad.v:7: Signal is not driven: sig_udrv
%Warning-UNDRIVEN: t/t_lint_unused_iface_bad.v:7: Signal is not driven: 'sig_udrv'
... Use "/* verilator lint_off UNDRIVEN */" and lint_on around source to disable this message.
%Warning-UNUSED: t/t_lint_unused_iface_bad.v:8: Signal is not used: sig_uusd
%Warning-UNUSED: t/t_lint_unused_iface_bad.v:8: Signal is not used: 'sig_uusd'
%Error: Exiting due to

4
test_regress/t/t_mod_dup_bad.out
View File

@ -1,6 +1,6 @@
%Warning-MODDUP: t/t_mod_dup_bad.v:13: Duplicate declaration of module: a
%Warning-MODDUP: t/t_mod_dup_bad.v:13: Duplicate declaration of module: 'a'
t/t_mod_dup_bad.v:6: ... Location of original declaration
... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.
%Warning-MULTITOP: t/t_mod_dup_bad.v:16: Multiple top level modules: b and test
%Warning-MULTITOP: t/t_mod_dup_bad.v:16: Multiple top level modules: 'b' and 'test'
: ... Suggest see manual; fix the duplicates, or use --top-module to select top.
%Error: Exiting due to

4
test_regress/t/t_multitop_sig_bad.out
View File

@ -1,5 +1,5 @@
%Warning-MULTITOP: t/t_multitop_sig.v:14: Multiple top level modules: b and a
%Warning-MULTITOP: t/t_multitop_sig.v:14: Multiple top level modules: 'b' and 'a'
: ... Suggest see manual; fix the duplicates, or use --top-module to select top.
... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.
%Warning-MULTITOP: t/t_multitop_sig.v:22: Multiple top level modules: c and b
%Warning-MULTITOP: t/t_multitop_sig.v:22: Multiple top level modules: 'c' and 'b'
%Error: Exiting due to

14
test_regress/t/t_order_clkinst_bad.out
View File

@ -1,9 +1,9 @@
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:17: Imperfect scheduling of variable: t.c1_start
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:17: Imperfect scheduling of variable: 't.c1_start'
... Use "/* verilator lint_off IMPERFECTSCH */" and lint_on around source to disable this message.
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:18: Imperfect scheduling of variable: t.c1_count
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:22: Imperfect scheduling of variable: t.s2_count
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:26: Imperfect scheduling of variable: t.c3_count
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:70: Imperfect scheduling of variable: t.c1.runner
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:99: Imperfect scheduling of variable: t.s2.runner
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:70: Imperfect scheduling of variable: t.c3.runner
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:18: Imperfect scheduling of variable: 't.c1_count'
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:22: Imperfect scheduling of variable: 't.s2_count'
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:26: Imperfect scheduling of variable: 't.c3_count'
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:70: Imperfect scheduling of variable: 't.c1.runner'
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:99: Imperfect scheduling of variable: 't.s2.runner'
%Warning-IMPERFECTSCH: t/t_order_clkinst.v:70: Imperfect scheduling of variable: 't.c3.runner'
%Error: Exiting due to

2
test_regress/t/t_order_wireloop.pl
View File

@ -15,7 +15,7 @@ compile(
# However we no longer gate optimize this
# Can't use expect_filename here as unstable output
expect =>
'%Warning-UNOPT: t/t_order_wireloop.v:\d+: Signal unoptimizable: Feedback to public clock or circular logic: bar
'%Warning-UNOPT: t/t_order_wireloop.v:\d+: Signal unoptimizable: Feedback to public clock or circular logic: \'bar\'
',
);

12
test_regress/t/t_package_export_bad.out
View File

@ -1,7 +1,7 @@
%Error: t/t_package_export.v:56: Can't find definition of scope/variable: PARAM2
%Error: t/t_package_export.v:57: Can't find definition of scope/variable: PARAM3
%Error: t/t_package_export.v:60: Can't find definition of scope/variable: PARAM2
%Error: t/t_package_export.v:61: Can't find definition of scope/variable: PARAM3
%Error: t/t_package_export.v:64: Can't find definition of scope/variable: PARAM2
%Error: t/t_package_export.v:65: Can't find definition of scope/variable: PARAM3
%Error: t/t_package_export.v:56: Can't find definition of scope/variable: 'PARAM2'
%Error: t/t_package_export.v:57: Can't find definition of scope/variable: 'PARAM3'
%Error: t/t_package_export.v:60: Can't find definition of scope/variable: 'PARAM2'
%Error: t/t_package_export.v:61: Can't find definition of scope/variable: 'PARAM3'
%Error: t/t_package_export.v:64: Can't find definition of scope/variable: 'PARAM2'
%Error: t/t_package_export.v:65: Can't find definition of scope/variable: 'PARAM3'
%Error: Exiting due to

2
test_regress/t/t_param_circ_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_param_circ_bad.v:10: Variable's initial value is circular: X
%Error: t/t_param_circ_bad.v:10: Variable's initial value is circular: 'X'
%Error: Exiting due to

2
test_regress/t/t_param_default_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_param_default_bad.v:6: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): Foo
%Error: t/t_param_default_bad.v:6: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'Foo'
%Error: Exiting due to

2
test_regress/t/t_param_up_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_param_up_bad.v:15: Can't find definition of scope/variable: bar
%Error: t/t_param_up_bad.v:15: Can't find definition of scope/variable: 'bar'
%Error: Exiting due to

2
test_regress/t/t_unopt_combo_bad.out
View File

@ -1,4 +1,4 @@
%Warning-UNOPTFLAT: t/t_unopt_combo.v:23: Signal unoptimizable: Feedback to clock or circular logic: t.c
%Warning-UNOPTFLAT: t/t_unopt_combo.v:23: Signal unoptimizable: Feedback to clock or circular logic: 't.c'
... Use "/* verilator lint_off UNOPTFLAT */" and lint_on around source to disable this message.
t/t_unopt_combo.v:23: Example path: t.c
t/t_unopt_combo.v:80: Example path: ALWAYS

2
test_regress/t/t_unopt_converge_unopt_bad.out
View File

@ -1,4 +1,4 @@
%Warning-UNOPT: t/t_unopt_converge.v:18: Signal unoptimizable: Feedback to public clock or circular logic: x
%Warning-UNOPT: t/t_unopt_converge.v:18: Signal unoptimizable: Feedback to public clock or circular logic: 'x'
... Use "/* verilator lint_off UNOPT */" and lint_on around source to disable this message.
t/t_unopt_converge.v:18: Example path: x
t/t_unopt_converge.v:21: Example path: ALWAYS

2
test_regress/t/t_unoptflat_simple_2_bad.out
View File

@ -1,4 +1,4 @@
%Warning-UNOPTFLAT: t/t_unoptflat_simple_2.v:14: Signal unoptimizable: Feedback to clock or circular logic: t.x
%Warning-UNOPTFLAT: t/t_unoptflat_simple_2.v:14: Signal unoptimizable: Feedback to clock or circular logic: 't.x'
... Use "/* verilator lint_off UNOPTFLAT */" and lint_on around source to disable this message.
t/t_unoptflat_simple_2.v:14: Example path: t.x
t/t_unoptflat_simple_2.v:16: Example path: ASSIGNW

4
test_regress/t/t_var_bad_hide.out
View File

@ -1,6 +1,6 @@
%Warning-VARHIDDEN: t/t_var_bad_hide.v:15: Declaration of signal hides declaration in upper scope: top
%Warning-VARHIDDEN: t/t_var_bad_hide.v:15: Declaration of signal hides declaration in upper scope: 'top'
t/t_var_bad_hide.v:12: ... Location of original declaration
... Use "/* verilator lint_off VARHIDDEN */" and lint_on around source to disable this message.
%Warning-VARHIDDEN: t/t_var_bad_hide.v:21: Declaration of signal hides declaration in upper scope: top
%Warning-VARHIDDEN: t/t_var_bad_hide.v:21: Declaration of signal hides declaration in upper scope: 'top'
t/t_var_bad_hide.v:12: ... Location of original declaration
%Error: Exiting due to

2
test_regress/t/t_var_bad_hide2.out
View File

@ -1,4 +1,4 @@
%Warning-VARHIDDEN: t/t_var_bad_hide2.v:13: Declaration of signal hides declaration in upper scope: t
%Warning-VARHIDDEN: t/t_var_bad_hide2.v:13: Declaration of signal hides declaration in upper scope: 't'
t/t_var_bad_hide2.v:6: ... Location of original declaration
... Use "/* verilator lint_off VARHIDDEN */" and lint_on around source to disable this message.
%Error: Exiting due to

12
test_regress/t/t_var_bad_sameas.out
View File

@ -1,11 +1,11 @@
%Error: t/t_var_bad_sameas.v:9: Unsupported in C: Cell has the same name as variable: varfirst
%Error: t/t_var_bad_sameas.v:9: Unsupported in C: Cell has the same name as variable: 'varfirst'
t/t_var_bad_sameas.v:8: ... Location of original declaration
%Error: t/t_var_bad_sameas.v:10: Unsupported in C: Task has the same name as cell: varfirst
%Error: t/t_var_bad_sameas.v:10: Unsupported in C: Task has the same name as cell: 'varfirst'
t/t_var_bad_sameas.v:9: ... Location of original declaration
%Error: t/t_var_bad_sameas.v:13: Unsupported in C: Variable has same name as cell: cellfirst
%Error: t/t_var_bad_sameas.v:14: Unsupported in C: Task has the same name as cell: cellfirst
%Error: t/t_var_bad_sameas.v:13: Unsupported in C: Variable has same name as cell: 'cellfirst'
%Error: t/t_var_bad_sameas.v:14: Unsupported in C: Task has the same name as cell: 'cellfirst'
t/t_var_bad_sameas.v:12: ... Location of original declaration
%Error: t/t_var_bad_sameas.v:17: Unsupported in C: Variable has same name as task: taskfirst
%Error: t/t_var_bad_sameas.v:18: Unsupported in C: Cell has the same name as task: taskfirst
%Error: t/t_var_bad_sameas.v:17: Unsupported in C: Variable has same name as task: 'taskfirst'
%Error: t/t_var_bad_sameas.v:18: Unsupported in C: Cell has the same name as task: 'taskfirst'
t/t_var_bad_sameas.v:16: ... Location of original declaration
%Error: Exiting due to

2
test_regress/t/t_var_const_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_var_const_bad.v:16: Assigning to const variable: five
%Error: t/t_var_const_bad.v:16: Assigning to const variable: 'five'
%Error: Exiting due to

4
test_regress/t/t_var_dup2_bad.out
View File

@ -1,6 +1,6 @@
%Error: t/t_var_dup2_bad.v:12: Duplicate declaration of signal: bad_o_w
%Error: t/t_var_dup2_bad.v:12: Duplicate declaration of signal: 'bad_o_w'
: ... note: ANSI ports must have type declared with the I/O (IEEE 2017 23.2.2.2)
t/t_var_dup2_bad.v:9: ... Location of original declaration
%Error: t/t_var_dup2_bad.v:13: Duplicate declaration of signal: bad_o_r
%Error: t/t_var_dup2_bad.v:13: Duplicate declaration of signal: 'bad_o_r'
t/t_var_dup2_bad.v:10: ... Location of original declaration
%Error: Exiting due to

40
test_regress/t/t_var_dup_bad.out
View File

@ -1,36 +1,36 @@
%Error: t/t_var_dup_bad.v:16: Duplicate declaration of signal: a
%Error: t/t_var_dup_bad.v:16: Duplicate declaration of signal: 'a'
t/t_var_dup_bad.v:15: ... Location of original declaration
%Error: t/t_var_dup_bad.v:19: Duplicate declaration of signal: l
%Error: t/t_var_dup_bad.v:19: Duplicate declaration of signal: 'l'
t/t_var_dup_bad.v:18: ... Location of original declaration
%Error: t/t_var_dup_bad.v:22: Duplicate declaration of signal: b
%Error: t/t_var_dup_bad.v:22: Duplicate declaration of signal: 'b'
t/t_var_dup_bad.v:21: ... Location of original declaration
%Error: t/t_var_dup_bad.v:25: Duplicate declaration of signal: o
%Error: t/t_var_dup_bad.v:25: Duplicate declaration of signal: 'o'
t/t_var_dup_bad.v:24: ... Location of original declaration
%Error: t/t_var_dup_bad.v:28: Duplicate declaration of signal: i
%Error: t/t_var_dup_bad.v:28: Duplicate declaration of signal: 'i'
t/t_var_dup_bad.v:27: ... Location of original declaration
%Error: t/t_var_dup_bad.v:31: Duplicate declaration of signal: oi
%Error: t/t_var_dup_bad.v:31: Duplicate declaration of signal: 'oi'
t/t_var_dup_bad.v:30: ... Location of original declaration
%Error: t/t_var_dup_bad.v:38: Duplicate declaration of signal: org
%Error: t/t_var_dup_bad.v:38: Duplicate declaration of signal: 'org'
t/t_var_dup_bad.v:37: ... Location of original declaration
%Error: t/t_var_dup_bad.v:65: Duplicate declaration of signal: bad_reout_port
%Error: t/t_var_dup_bad.v:65: Duplicate declaration of signal: 'bad_reout_port'
t/t_var_dup_bad.v:63: ... Location of original declaration
%Error: t/t_var_dup_bad.v:72: Duplicate declaration of signal: bad_rewire
%Error: t/t_var_dup_bad.v:72: Duplicate declaration of signal: 'bad_rewire'
t/t_var_dup_bad.v:69: ... Location of original declaration
%Error: t/t_var_dup_bad.v:73: Duplicate declaration of signal: bad_rereg
%Error: t/t_var_dup_bad.v:73: Duplicate declaration of signal: 'bad_rereg'
t/t_var_dup_bad.v:70: ... Location of original declaration
%Error: t/t_var_dup_bad.v:12: Duplicate declaration of port: oi
%Error: t/t_var_dup_bad.v:12: Duplicate declaration of port: 'oi'
t/t_var_dup_bad.v:30: ... Location of original declaration
%Error: t/t_var_dup_bad.v:49: Duplicate declaration of port: bad_duport
%Error: t/t_var_dup_bad.v:49: Duplicate declaration of port: 'bad_duport'
t/t_var_dup_bad.v:51: ... Location of original declaration
%Error: t/t_var_dup_bad.v:57: Duplicate declaration of port: bad_mixport
%Error: t/t_var_dup_bad.v:57: Duplicate declaration of port: 'bad_mixport'
t/t_var_dup_bad.v:57: ... Location of original declaration
%Error: t/t_var_dup_bad.v:40: Can't find definition of variable: bad_duport
%Error: t/t_var_dup_bad.v:40: Duplicate pin connection: bad_duport
%Error: t/t_var_dup_bad.v:40: Can't find definition of variable: 'bad_duport'
%Error: t/t_var_dup_bad.v:40: Duplicate pin connection: 'bad_duport'
t/t_var_dup_bad.v:40: ... Location of original pin connection
%Error: t/t_var_dup_bad.v:41: Can't find definition of variable: bad_mixport
%Error: t/t_var_dup_bad.v:41: Duplicate pin connection: bad_mixport
%Error: t/t_var_dup_bad.v:41: Can't find definition of variable: 'bad_mixport'
%Error: t/t_var_dup_bad.v:41: Duplicate pin connection: 'bad_mixport'
t/t_var_dup_bad.v:41: ... Location of original pin connection
%Error: t/t_var_dup_bad.v:42: Can't find definition of variable: bad_reout_port
%Error: t/t_var_dup_bad.v:43: Can't find definition of variable: bad_rewire
%Error: t/t_var_dup_bad.v:43: Can't find definition of variable: bad_rereg
%Error: t/t_var_dup_bad.v:42: Can't find definition of variable: 'bad_reout_port'
%Error: t/t_var_dup_bad.v:43: Can't find definition of variable: 'bad_rewire'
%Error: t/t_var_dup_bad.v:43: Can't find definition of variable: 'bad_rereg'
%Error: Exiting due to

4
test_regress/t/t_var_in_assign_bad.out
View File

@ -1,3 +1,3 @@
%Error-ASSIGNIN: t/t_var_in_assign_bad.v:11: Assigning to input/const variable: value
%Error-ASSIGNIN: t/t_var_in_assign_bad.v:20: Assigning to input/const variable: valueSub
%Error-ASSIGNIN: t/t_var_in_assign_bad.v:11: Assigning to input/const variable: 'value'
%Error-ASSIGNIN: t/t_var_in_assign_bad.v:20: Assigning to input/const variable: 'valueSub'
%Error: Exiting due to

10
test_regress/t/t_var_notfound_bad.out
View File

@ -1,9 +1,9 @@
%Error: t/t_var_notfound_bad.v:17: Can't find definition of variable: nf
%Error: t/t_var_notfound_bad.v:18: Can't find definition of 'subsubz' in dotted scope/variable: sub.subsubz
%Error: t/t_var_notfound_bad.v:17: Can't find definition of variable: 'nf'
%Error: t/t_var_notfound_bad.v:18: Can't find definition of 'subsubz' in dotted scope/variable: 'sub.subsubz'
... Known scopes under 'sub': subsub
%Error: t/t_var_notfound_bad.v:19: Can't find definition of task/function: nofunc
%Error: t/t_var_notfound_bad.v:20: Can't find definition of 'nofuncs' in dotted task/function: sub.nofuncs
%Error: t/t_var_notfound_bad.v:19: Can't find definition of task/function: 'nofunc'
%Error: t/t_var_notfound_bad.v:20: Can't find definition of 'nofuncs' in dotted task/function: 'sub.nofuncs'
... Known scopes under 'nofuncs': <no cells found>
%Error: t/t_var_notfound_bad.v:21: Can't find definition of task/function: notask
%Error: t/t_var_notfound_bad.v:21: Can't find definition of task/function: 'notask'
%Error: t/t_var_notfound_bad.v:22: Found definition of 'a_var' as a VAR but expected a task/function
%Error: Exiting due to

4
test_regress/t/t_var_port2_bad.out
View File

@ -1,3 +1,3 @@
%Error: t/t_var_port2_bad.v:6: Input/output/inout declaration not found for port: portwithoin
%Error: t/t_var_port2_bad.v:7: Input/output/inout does not appear in port list: portwithin
%Error: t/t_var_port2_bad.v:6: Input/output/inout declaration not found for port: 'portwithoin'
%Error: t/t_var_port2_bad.v:7: Input/output/inout does not appear in port list: 'portwithin'
%Error: Exiting due to

2
test_regress/t/t_var_port_bad.out
View File

@ -1,2 +1,2 @@
%Error: t/t_var_port_bad.v:15: Input/output/inout does not appear in port list: b
%Error: t/t_var_port_bad.v:15: Input/output/inout does not appear in port list: 'b'
%Error: Exiting due to

2
test_regress/t/t_var_ref_bad2.out
View File

@ -1,3 +1,3 @@
%Error: t/t_var_ref_bad2.v:12: Assigning to const ref variable: bad_const_set
%Error: t/t_var_ref_bad2.v:12: Assigning to const ref variable: 'bad_const_set'
%Error: t/t_var_ref_bad2.v:22: Ref argument requires matching types; port 'int_ref' requires VAR 'int_ref' but connection is VARREF 'bad_non_int'.
%Error: Exiting due to

2
test_regress/t/t_var_ref_bad3.out
View File

@ -1,2 +1,2 @@
%Error: t/t_var_ref_bad3.v:9: Unsupported: ref/const ref as primary input/output: bad_primary_ref
%Error: t/t_var_ref_bad3.v:9: Unsupported: ref/const ref as primary input/output: 'bad_primary_ref'
%Error: Exiting due to

4
test_regress/t/t_var_suggest_bad.out
View File

@ -1,3 +1,3 @@
%Error: t/t_var_suggest_bad.v:12: Can't find definition of variable: foobat
%Error: t/t_var_suggest_bad.v:13: Can't find definition of task/function: boobat
%Error: t/t_var_suggest_bad.v:12: Can't find definition of variable: 'foobat'
%Error: t/t_var_suggest_bad.v:13: Can't find definition of task/function: 'boobat'
%Error: Exiting due to

4
test_regress/t/t_wire_beh_bad.out
View File

@ -1,3 +1,3 @@
%Error-CONTASSREG: t/t_wire_beh_bad.v:11: Continuous assignment to reg, perhaps intended wire (IEEE 2005 6.1; Verilog only, legal in SV): r
%Error-PROCASSWIRE: t/t_wire_beh_bad.v:12: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): w
%Error-CONTASSREG: t/t_wire_beh_bad.v:11: Continuous assignment to reg, perhaps intended wire (IEEE 2005 6.1; Verilog only, legal in SV): 'r'
%Error-PROCASSWIRE: t/t_wire_beh_bad.v:12: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): 'w'
%Error: Exiting due to