forked from github/verilator
Cleanup CDC reports, remove TOP-> signal prefixes
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parent
8287cf35e7
commit
0af0d3b171
@ -192,6 +192,7 @@ string AstNode::prettyName(const string& namein) {
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}
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}
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if (pretty.substr(0,4) == "TOP.") pretty.replace(0,4,"");
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if (pretty.substr(0,5) == "TOP->") pretty.replace(0,5,"");
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return pretty;
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}
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@ -12,11 +12,11 @@ compile (
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verilator_make_gcc => 0,
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fails => 1,
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expect=>
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'%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:\d+: Logic in path that feeds async reset, via signal: TOP->v.rst2_bad_n
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'%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:\d+: Logic in path that feeds async reset, via signal: v.rst2_bad_n
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%Warning-CDCRSTLOGIC: Use "/\* verilator lint_off CDCRSTLOGIC \*/" and lint_on around source to disable this message.
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%Warning-CDCRSTLOGIC: See details in obj_dir/t_cdc_async_bad/Vt_cdc_async_bad__cdc.txt
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%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:\d+: Logic in path that feeds async reset, via signal: TOP->v.rst6a_bad_n
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%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:\d+: Logic in path that feeds async reset, via signal: TOP->v.rst3_bad_n
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%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:\d+: Logic in path that feeds async reset, via signal: v.rst6a_bad_n
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%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:\d+: Logic in path that feeds async reset, via signal: v.rst3_bad_n
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%Error: Exiting due to.*',
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);
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@ -14,7 +14,7 @@ compile (
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make_top_shell => 0,
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make_main => 0,
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expect=>
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'%Warning-SYNCASYNCNET: t/t_lint_syncasyncnet_bad.v:\d+: Signal flopped as both synchronous and async: TOP->rst_both_l
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'%Warning-SYNCASYNCNET: t/t_lint_syncasyncnet_bad.v:\d+: Signal flopped as both synchronous and async: rst_both_l
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%Warning-SYNCASYNCNET: Use .* around source to disable this message.
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%Warning-SYNCASYNCNET: t/t_lint_syncasyncnet_bad.v:\d+: ... Location of async usage
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%Warning-SYNCASYNCNET: t/t_lint_syncasyncnet_bad.v:\d+: ... Location of sync usage
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@ -12,13 +12,13 @@ top_filename("t/t_unopt_combo.v");
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compile (
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fails=>$Self->{v3},
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expect=>
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'%Warning-UNOPTFLAT: t/t_unopt_combo.v:\d+: Signal unoptimizable: Feedback to clock or circular logic: TOP->v.c
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'%Warning-UNOPTFLAT: t/t_unopt_combo.v:\d+: Signal unoptimizable: Feedback to clock or circular logic: v.c
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%Warning-UNOPTFLAT: Use "/\* verilator lint_off UNOPTFLAT \*/" and lint_on around source to disable this message.
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%Warning-UNOPTFLAT: Example path: t/t_unopt_combo.v:\d+: TOP->v.c
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%Warning-UNOPTFLAT: Example path: t/t_unopt_combo.v:\d+: v.c
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%Warning-UNOPTFLAT: Example path: t/t_unopt_combo.v:\d+: ALWAYS
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%Warning-UNOPTFLAT: Example path: t/t_unopt_combo.v:\d+: TOP->v.b
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%Warning-UNOPTFLAT: Example path: t/t_unopt_combo.v:\d+: v.b
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%Warning-UNOPTFLAT: Example path: t/t_unopt_combo.v:\d+: ALWAYS
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%Warning-UNOPTFLAT: Example path: t/t_unopt_combo.v:\d+: TOP->v.c
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%Warning-UNOPTFLAT: Example path: t/t_unopt_combo.v:\d+: v.c
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%Error: Exiting due to '
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);
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@ -11,7 +11,7 @@ top_filename("t/t_unopt_converge.v");
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compile (
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fails=>1,
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expect=> '%Warning-UNOPT: t/t_unopt_converge.v:\d+: Signal unoptimizable: Feedback to public clock or circular logic: TOP->x
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expect=> '%Warning-UNOPT: t/t_unopt_converge.v:\d+: Signal unoptimizable: Feedback to public clock or circular logic: x
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.*
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%Error: Exiting due to '
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) if $Self->{v3};
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