forked from github/verilator
6 lines
336 B
Plaintext
6 lines
336 B
Plaintext
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%Error: t/t_inst_misarray2_bad.v:10:17: Illegal input port connection 'i_data', mismatch between port which is not an array, and expression which is an array. (IEEE 1800-2017 7.6)
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: ... In instance t
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10 | .i_data(fft_oQ[6:0])
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| ^~~~~~
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%Error: Exiting due to
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