forked from github/verilator
33 lines
907 B
Perl
33 lines
907 B
Perl
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#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator_st => 1);
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top_filename("t/t_time_vpi.v");
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$Self->{main_time_multiplier} = 1e-3 / 10e-9;
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compile(
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v_flags2 => ['+define+time_scale_units=1ms +define+time_scale_prec=10ns',
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't/t_time_vpi_c.cpp'],
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verilator_flags2 => ['--vpi --trace'],
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);
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execute(
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check_finished => 1,
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expect_filename => $Self->{golden_filename},
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);
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file_grep("$Self->{obj_dir}/simx.vcd", qr!timescale +10ns!);
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ok(1);
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1;
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