forked from github/verilator
5 lines
301 B
Plaintext
5 lines
301 B
Plaintext
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%Error: t/t_lint_rsvd_bad.v:6: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
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%Error: t/t_lint_rsvd_bad.v:6: syntax error, unexpected IDENTIFIER
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%Error: t/t_lint_rsvd_bad.v:7: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
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%Error: Exiting due to
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