forked from github/verilator
17 lines
410 B
Coq
17 lines
410 B
Coq
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2018 by Wilson Snyder.
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module t (/*AUTOARG*/);
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localparam string SVEC [0:7] = '{"zero", "one", "two", "three", "four", "five", "six", "seven"};
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initial begin
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$display("%s", SVEC[3'd1]);
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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