forked from github/verilator
30 lines
844 B
Coq
30 lines
844 B
Coq
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2008 by Wilson Snyder.
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`include "verilated.v"
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module t;
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`verilator_file_descriptor infile, outfile;
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integer count, a;
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initial begin
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infile = $fopen("t/t_sys_file_scan_input.dat", "r");
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outfile = $fopen("obj_dir/t_sys_file_scan_test.log", "w");
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count = 1234;
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$display("count == %d, infile %d, outfile %d", count, infile, outfile);
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count = $fscanf(infile, "%d\n", a);
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$display("count == %d, infile %d, outfile %d", count, infile, outfile);
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$fwrite(outfile, "# a\n");
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$fwrite(outfile, "%d\n", a);
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$fclose(infile);
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$fclose(outfile);
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$write("*-* All Finished *-*\n");
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$finish(0); // Test arguments to finish
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end
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endmodule
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