forked from github/verilator
14 lines
662 B
Plaintext
14 lines
662 B
Plaintext
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%Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:20: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): 'w'
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: ... In instance t
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w = '0;
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^
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%Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:21: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): 'o'
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: ... In instance t
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o = '0;
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^
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%Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:22: Procedural assignment to wire, perhaps intended var (IEEE 2017 6.5): 'oa'
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: ... In instance t
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oa = '0;
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^~
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%Error: Exiting due to
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