forked from github/verilator
10 lines
266 B
Plaintext
10 lines
266 B
Plaintext
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2020 by Marco Widmer.
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// SPDX-License-Identifier: CC0-1.0
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`verilator_config
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split_var -module "barshift_1d_unpacked" -var "tmp"
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