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HOWTO.md
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## How to Participate
- Visit the [SSCS Chipathon GitHub Repository](https://github.com/sscs-ose/sscs-ose-chipathon.github.io) to learn more about design tool setup, as well as the design target and its suggested baseline specifications.
- Join the “opensource-silicon” Slack space and subscribe to the [#ieee-sscs-dc-23](https://join.slack.com/share/enQtNDc1MjgzMTc4NTYyMC03YTY5NjI0NGUxN2UyMjgzZmI5YTQyYTcxMzQxY2M4NjUyMTk3ODE3ZTgzNTY2ZmQ3M2Y0NjYyZDQ4NWZjYmQ5) channel. This is the Chipathon’s main communication channel. Feel free to post any questions here (about tool setup, circuit design, etc.).
- Join the “opensource-silicon” Slack space and subscribe to the [#ieee-sscs-dc-23](https://join.slack.com/share/enQtNDkxOTIwNjQ5NzQxNC1kM2JkM2ViNTk5NmVhZTJmZGJjNDE4ODNiOTc3NTFhMDRiYjhmMDA4ZTYyZGQ5ZDgwMGNkNjFmMmQ0ZmQ5Yzg3) channel. This is the Chipathon’s main communication channel. Feel free to post any questions here (about tool setup, circuit design, etc.).
- Optionally, join the Chipathon info session (see schedule below) to ask questions and learn more about the design goals and logistics.
Create a Jupyter notebook detailing the main ideas of your design. You can choose to address a single sub-block (e.g., a programmable gain amplifier for the oscilloscope) or a more complete solution (e.g., the complete waveform generator design). For an example on how to describe a design idea using Jupyter, please see this [temperature sensor notebook](https://github.com/idea-fasoc/OpenFASOC/blob/main/docs/source/notebooks/temp-sense-gen/temp_sense_genCollab.ipynb).
- Create a Jupyter notebook detailing the main ideas of your design. You can choose to address a single sub-block (e.g., a programmable gain amplifier for the oscilloscope) or a more complete solution (e.g., the complete waveform generator design). For an example on how to describe a design idea using Jupyter, please see this [temperature sensor notebook](https://github.com/idea-fasoc/OpenFASOC/blob/main/docs/source/notebooks/temp-sense-gen/temp_sense_genCollab.ipynb).
**Note: It is not necessary to create a layout at the proposal stage**.
- Create a pull request for your proposal notebook submission by the deadline stated below. Refer to the “how to submit” instructions in the Chipathon repository for further details.

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SPECS.md
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@ -8,7 +8,7 @@ The purpose of this page is to seed some ideas on what the “lab bench on a ch
To our knowledge, there aren't any published prior-art “lab bench on a chip” designs that we can build on. However, we can draw some inspiration from a similar system that was designed for PCB measurements. The [Analog Discovery 2](https://digilent.com/reference/test-and-measurement/analog-discovery-2/start) is a multifunction instrument that has all the functionality we are looking for (and more) and comes with detailed [schematics](https://digilent.com/reference/test-and-measurement/analog-discovery-2/hardware-design-guide). While this documentation provides a first-order idea on what we should build, the circuit design style will be somewhat different for on-chip circuitry. Additionally, it will be difficult to match all specifications within a reasonable area budget and given the 180 nm technology that we have at our disposal.
Generally, think of this entire project is an experiment. We want to explore what a team of enthusiasts, spread across the globe, can do within the new environment of open-source IC design. Even if we don't succeed at building the complete target system in our first attempt, the community can re-use the various blocks that we design for future iterations or for an entirely different purpose.
Generally, think of this entire project as an experiment. We want to explore what a team of enthusiasts, spread across the globe, can do within the new environment of open-source IC design. Even if we don't succeed at building the complete target system in our first attempt, the community can re-use the various blocks that we design for future iterations or for an entirely different purpose.
What follows below are initial thoughts and baseline specs for each one of our major system components. All teams are encouraged to exceed these requirements and explore what is possible!
@ -60,4 +60,4 @@ For the DAC, it may be best to aim for a current steering topology (also used in
**6. Digital interface**
One of the primary goals here is to enable a convenient USB interface to a host computer. Teams working on this aspect should design both the on- and off-chip digital circuitry. For the off-chip board, we can consider the lowest cost boards from [Digilent](https://digilent.com/shop/boards-and-components/system-boards/introductory-boards/?sort=priceasc). The USB UART provided [here](https://github.com/ricynlee/cmod-a7-uart-sram-test) could be useful for establishing the communication.
One of the primary goals here is to enable a convenient USB interface to a host computer. Teams working on this aspect should design both the on- and off-chip digital circuitry. For the external board, we can consider the lowest cost options from [Digilent](https://digilent.com/shop/boards-and-components/system-boards/introductory-boards/?sort=priceasc). The USB UART provided [here](https://github.com/ricynlee/cmod-a7-uart-sram-test) could be useful for establishing the communication.