Update 'Home'

Mario Romero 2023-03-31 22:49:58 +00:00
parent 0d3857d0a6
commit b29719a310

15
Home.md

@ -1 +1,14 @@
Welcome to the Wiki.
# RVSCC Wiki
Project documentation and reference.
## Table of Contents
- [General Architecture](Architecture)
- Datapaths
- [Single-Cycle](Single-Cycle-Datapath)
- 5-Stage Multi-Cycle
- [5-Stage Pipelined](Five-Stage-Pipelined-Datapath)
- Interfaces
- Instruction Memory Interface
- Data Memory Interface
- AXI4
- Verification