Update 'Architecture'
parent
70a9b1bbab
commit
617074285f
2
Architecture.md
Normal file
2
Architecture.md
Normal file
@ -0,0 +1,2 @@
|
||||
The different cores at RVSCC integrate diverse pipelines with interfaces to interact with custom instruction and data memory systems.
|
||||
TODO: insert imem;pipeline;dmem diagram
|
Loading…
Reference in New Issue
Block a user