25 lines
586 B
Systemverilog
25 lines
586 B
Systemverilog
`include "timescale.sv"
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import rv32i_defs::*;
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module instr_memory #(
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parameter string FILE_PATH = "",
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parameter int NUM_INSTR = 32
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) (
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instr_memory_if.mem instr_mem_if
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);
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// Number of bits referenced with one address
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localparam int BlockSize = 8;
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localparam int NumBlocks = NUM_INSTR * 4;
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logic [BlockSize-1:0] mem[NumBlocks];
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assign instr_mem_if.instr = {
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mem[instr_mem_if.addr+'d0],
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mem[instr_mem_if.addr+'d1],
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mem[instr_mem_if.addr+'d2],
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mem[instr_mem_if.addr+'d3]
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};
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initial $readmemh(FILE_PATH, mem);
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endmodule
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