19 lines
406 B
Systemverilog
Executable File
19 lines
406 B
Systemverilog
Executable File
`include "timescale.sv"
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import rv32i_defs::*;
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interface instr_memory_if #(
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parameter int NUM_INSTR = 32
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);
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localparam int AddrSize = $clog2(NUM_INSTR) * 4;
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logic [AddrSize-1:0] addr;
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logic [InstructionSize-1:0] instr;
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modport mem(input addr, output instr);
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modport datapath(input instr, output addr);
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function static void next_instr();
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addr = addr + 'd4;
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endfunction
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endinterface
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