70 lines
1.4 KiB
Systemverilog
Executable File
70 lines
1.4 KiB
Systemverilog
Executable File
`timescale 1ns / 1ps
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import rv32i_defs::*;
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module test_instr_memory ();
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localparam string Path = "../fw/test/test-core.mem";
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localparam int NumInstr = 32;
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localparam int NumBlocks = NumInstr * 4;
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localparam int AddrSize = $clog2(NumBlocks);
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logic [AddrSize-1:0] addr;
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logic [InstructionSize-1:0] instr;
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instr_memory_if #(.NUM_INSTR(NumInstr)) dut_if();
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instr_memory #(
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.FILE_PATH(Path),
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.NUM_INSTR(NumInstr)
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) dut (
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.instr_mem_if(dut_if.mem)
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);
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const
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int
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assert_instr_mem[21] = {
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'h00500113,
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'h00C00193,
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'hFF718393,
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'h0023E233,
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'h0041F2B3,
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'h004282B3,
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'h02728863,
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'h0041A233,
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'h00020463,
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'h00000293,
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'h0023A233,
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'h005203B3,
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'h402383B3,
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'h0471AA23,
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'h06002103,
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'h005104B3,
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'h008001EF,
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'h00100113,
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'h00910133,
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'h0221A023,
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'h00210063
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};
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initial begin
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dut_if.addr = 'd0;
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#1
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assert (!$isunknown(dut_if.instr))
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else $error("Instruction memory not loaded");
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#1;
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foreach (assert_instr_mem[i]) begin
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#1
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assert (dut_if.instr == assert_instr_mem[i])
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else
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$error(
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"Instruction %h at address %h does not match the expected intruction %h",
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dut_if.instr,
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dut_if.addr,
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assert_instr_mem[i]
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);
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dut_if.next_instr();
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end
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$finish;
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end
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endmodule
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