Update cache test

test/CMakeLists.txt

@@ -104,3 +104,14 @@ rvscc_add_test(
   			${PROJECT_SOURCE_DIR}/rtl/priority_encoder.sv
 	        ${PROJECT_SOURCE_DIR}/test/test_cache_memory.sv
 )
+
+rvscc_add_test(
+	NAME two-way-lru-cache
+	TOP test_two_way_lru_cache
+  	SOURCES ${PROJECT_SOURCE_DIR}/rtl/rv32i_defs.sv
+			${PROJECT_SOURCE_DIR}/rtl/two_way_lru_cache.sv
+			${PROJECT_SOURCE_DIR}/rtl/two_way_lru_cru.sv
+			${PROJECT_SOURCE_DIR}/rtl/cache_memory.sv
+  			${PROJECT_SOURCE_DIR}/rtl/priority_encoder.sv
+	        ${PROJECT_SOURCE_DIR}/test/test_two_way_lru_cache.sv
+)

test/test_cache_memory.sv

@@ -27,11 +27,12 @@ module test_cache_memory ();
       .write_data(write_data),
       .read_data(read_data),
       .hit(hit),
-      .populate_way(populate_way)
+      .populate_way(populate_way),
+      .populated()
   );
 
   localparam int ClockCycle = 2;
-  always #(ClockCycle/2) clk = !clk;
+  always #(ClockCycle / 2) clk = !clk;
 
   logic [31:0] write_value;
 

test/test_two_way_lru_cache.sv

@@ -1,6 +1,6 @@
 `timescale 1ns / 1ps
 
-module Test_TwoWayLRUCache();
+module test_two_way_lru_cache();
     logic clk, rst;
     logic[31:0] addr;
     logic write_enable;