From 4a05b75da05a7ef6e0cbbc2c418256fcfbf42fa2 Mon Sep 17 00:00:00 2001 From: Mario1159 Date: Sun, 19 Feb 2023 20:59:12 +0000 Subject: [PATCH] Update tests --- test/Test_ALU.sv | 29 ++++++++++++++++++++++++----- test/Test_DataMemory.sv | 11 +++++------ test/Test_ImmExtend.sv | 3 +-- test/Test_PriorityEncoder.sv | 9 +++------ 4 files changed, 33 insertions(+), 19 deletions(-) diff --git a/test/Test_ALU.sv b/test/Test_ALU.sv index 47e1335..11c5987 100644 --- a/test/Test_ALU.sv +++ b/test/Test_ALU.sv @@ -13,13 +13,32 @@ module Test_ALU (); .status(status) ); + localparam RandomSumIterations = 32; + initial begin - a = 'd3; - b = 'd11; + $dumpfile("dump.vcd"); + $dumpvars; + + a = 'd0; + b = 'd0; opcode = 'd0; - assert(result != 'd14) $display("3 + 11 != 14"); - assert(status != 'b0000) $display("status(3 + 11) != 0000"); - $display("Test successful"); + #1 + assert(result == 'd0) else $error("Incorrent result in operation: %d + %d", a, b); + assert(status == 'b0100) else $error("Incorrent flags in operation: %d + %d", a, b); + + a = 'hFFFF_FFFF; + b = 'd0; + #1 + assert(result == 'hFFFF_FFFF) else $error("Incorrent result in operation: %d + %d", a, b); + assert(status == 'b1000) else $error("Incorrent flags in operation: %d + %d", a, b); + + for(int i = 0; i < RandomSumIterations; i++) begin + a = $random; + b = $random; + opcode = 'd0; + #1 + assert(result == a + b) else $error("Failed in operation: %d + %d", a, b); + end $finish; end endmodule diff --git a/test/Test_DataMemory.sv b/test/Test_DataMemory.sv index a10f90e..0c40b96 100644 --- a/test/Test_DataMemory.sv +++ b/test/Test_DataMemory.sv @@ -26,8 +26,6 @@ module Test_DataMemory (); logic [MemoryWriteRange:0][31:0] write_values; int start_addr; initial begin - $dumpfile("dump.vcd"); - $dumpvars(); // Reset clk = 0; rst = 1; @@ -39,7 +37,7 @@ module Test_DataMemory (); write_enable = 1; start_addr = $urandom_range(15); for (int i = 0; i < MemoryWriteRange; i++) begin - addr = start_addr + i; + addr = start_addr + i*4; write_values[i] = $urandom(); write_data = write_values[i]; #2; @@ -47,11 +45,12 @@ module Test_DataMemory (); // Read and compare the same range of values write_enable = 0; #4; - for (int i = 0; i < 16; i++) begin - addr = start_addr + i; + for (int i = 0; i < MemoryWriteRange; i++) begin + addr = start_addr + i*4; + #1; assert (read_data == write_values[i]) else $error("Read failed at address %h", addr); - #2; + #1; end $finish; end diff --git a/test/Test_ImmExtend.sv b/test/Test_ImmExtend.sv index 15a3bbf..44e49f6 100644 --- a/test/Test_ImmExtend.sv +++ b/test/Test_ImmExtend.sv @@ -31,8 +31,7 @@ module Test_ImmExtend (); $readmemh("../fw/test/test-imm.mem", mem); instr_info = '{ // instr_info_t'{2'h3, 32'hFFFF_FFE2}, - instr_info_t -'{2'h3, 32'h0000_07E6}, + instr_info_t'{2'h3, 32'h0000_07E6}, instr_info_t'{2'h2, 32'h0000_0008}, instr_info_t'{2'h1, 32'h0000_07FA}, instr_info_t'{2'h0, 32'hFFFF_FFFF}, diff --git a/test/Test_PriorityEncoder.sv b/test/Test_PriorityEncoder.sv index 22d8d80..561e72d 100644 --- a/test/Test_PriorityEncoder.sv +++ b/test/Test_PriorityEncoder.sv @@ -12,16 +12,13 @@ module Test_PriorityEncoder(); initial begin data_in = 'b00000001; for (int i = 0; i < 8; i++) begin - assert (data_out == i[2:0] + 1 || valid == 1) else $error("[One-hot] Failed at %d", i); - #1 + #1 assert (data_out == i[2:0] && valid == 1) else $error("Failed one-hot to index check at iteration %0d, %d", i, data_out); data_in = data_in << 'd1; end - #1 data_in = 'b00101111; - assert (data_out == 'd5) else $error("[Manual entry] Failed at " + 5); - #1 + #1 assert (data_out == 'd5) else $error("Incorrect result with input %b", data_in); data_in = 'b10101010; - assert (data_out == 'd7) else $error("[Manual entry] Failed at " + 7); + #1 assert (data_out == 'd7) else $error("Incorrect result with input %b", data_in); $finish; end endmodule